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8,786 Views
Registered: ‎07-28-2008

Configuration by CF-Card fails

Hello everybody,

i am using the ML402 evaluation board with the virtex 4 FPGA. I tried to configure the FPGA by the CF-Card. Unfortunatly this will not work! When I put in the CF-Card, the error LED goes on. I copied the files with XILINX ISE 9.2 (iMPACT). It is a 32MB Card with FAT16 file system. Has sonebody a suggestion?

 

Thanks a lot!

 

Martin

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edk_dingle
Observer
Observer
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Registered: ‎08-02-2007

Martin,

Have you tried downloading the original CF image for the ML402 off of the xilinx.com website - http://www.xilinx.com/products/boards/ml402/reference_designs.htm. You should first see if you are able to get the CF card image files to work. Then if these are working, you may be generating the ace file incorrectly.

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borisq
Xilinx Employee
Xilinx Employee
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Registered: ‎08-07-2007

hi martin,

 

re-format the cf card using mkdosfs tool

 

boris

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8,374 Views
Registered: ‎07-28-2008

well, thank you very much!

The original CF image works well, but when I replace the system_my_ace.ace with my file I renamed to system_my_ace.ace, the error appears again.

I don't where is the problem, because when I program the FPGA via JTAG it works as it should. Maybe I have to configure something in iMpact options but I don't know where or which one.

 

Can somebody help? Thanks a lot!

 

Martin

Message Edited by maddin_the_brain on 09-03-2008 01:42 AM
Message Edited by maddin_the_brain on 09-03-2008 01:43 AM
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mcgett
Xilinx Employee
Xilinx Employee
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Registered: ‎01-03-2008

When you created the ACE file, did you define the JTAG chain exactly as seen by the System ACE?
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8,331 Views
Registered: ‎07-28-2008

Well I read out the JTAG Chain via the Parallel III Cable with the iMPact software. But I didn't found any other options for the JTAG chain. Can you give some advices about the proper configuration of the JTAG chain?

 

Tanks a lot, Martin

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mcgett
Xilinx Employee
Xilinx Employee
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Registered: ‎01-03-2008

Did you include the SystemACE in the JTAG chain when you set this up in impact, or did you just have the PROM, CPLD and FPGA?

 

If you included the SystemACE this is incorrect.  

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8,295 Views
Registered: ‎07-28-2008

@mcgett

 

I think that the first block is the system ace. Well I initialize the JTAG chain in the boundary scan and bypassed (well in the picture it isn't) all blocks but the xc4vsx3. Should I add files to the other blocks, too?

 

When I make the Compact Flash Integrity Check everything seems to in order. 

 

I tried also this. I deleted the xccace block from the chain. Then I generated a new file for CF at the SystemACE configuration mode, but with the same result the file from the cf card will not work.

 

 Where's the key to success? Thank you very much!

Message Edited by maddin_the_brain on 09-05-2008 12:10 AM
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