09-20-2018 01:06 AM
I want to get a square waveform with customized Ton, Toff and pulse width from the PMOD header 8 pins of zynq ZC706 evolution board. For that, I've written a synthesizable code in Verilog, with a clock input of 10 MHZ from system differential clock. Initially, I found that the code worked well in case of simulation, which I have included with this thread, but in real life, I'm not getting the proper desired signal when I'm observing the output at a 100Mhz DSO. I've cross-checked the proper port numbers for each and every pin in the PMOD header.
What could be the reason? Is there any idea to obtain this? Please help me In this regards.
09-20-2018 07:13 AM
Try putting an ILA just before the output of your FPGA. That way you can see if there is a problem with the logic or is there is a problem elsewhere. Check your xdc file an be sure you have the output on the correct pin. Do you see anything at all with the scope?
01-25-2019 01:38 AM
There is a level-shifter TXS0108E between Zynq and PMOD header. I think it is a problem for 100 MHz signal. Check the specification of TXS0108E to make sure.