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Adventurer
Adventurer
10,180 Views
Registered: ‎02-17-2017

Defective KCU116 Board

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If I ordered two KCU105 and two KCU116 boards and I believe that the SGMII Ethernet PHY is defective on one of the boards, who would I attempt to contact? My company does not buy enough from xilinx to receive technical support.

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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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@lifeline99

@austin

 

Okay, @jlarkin, So it is confirmed that the PHY will never come up on power up without an MDIO interface from the FPGA to the PHY making the register adjustments?

 

The instruction that you have provided:

In the VCU118 and KCU116 MGT Clock is driven from TI PHY device DP83867ISRGZ.  The SGMII clock needs to be enabled, by writing 0x4000 to register 0xD3.

In the Control Register (Register 0), Enable Auto-negotiation and configure link speed and duplex settings.
In the Configuration Register 2 (CFG2), Address 0x0014, Configure interrupt polarity, enable auto negotiation, Enable Speed Optimization.
RGMII must be disabled, by writing 0cx0 to register 0x32.
 
Then wait for Link up by reading the link partner ability register (Register 5) Poll for bit 14 to be set.
If RX_CTRL is not strapped to mode 3 or 4, a software workaround sequence is needed: In Register 31 clear Bit 7 and set Bit 8 and bits [6:5]

View solution in original post

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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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I ordered the boards directly from xilinx

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Scholar austin
Scholar
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Registered: ‎02-27-2008

Re: Defective KCU116 Board

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i,

 

Have you tried logging into the service portal (for handling a return)?

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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@austin

 

I am able to start a return, but I would like some indication as to whether I am correct about it being defective. Would it be possible to get a sample design for the Ethernet PHY on the KCU116 that is known working, that will simply power the chip up correctly? I just want to see the LINK LED go on. If I have a defective board I would then feel a lot better about not being able to get it working. 

 

The Built in test for the KCU116 board, at least mine, do not power up the Tri Mode SGMII Ethernet PHY, as indicated by the LEDs.

 

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Scholar austin
Scholar
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Registered: ‎02-27-2008

Re: Defective KCU116 Board

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I will get a moderator to advise you, but based on what you reported, it does sound like it isn't working properly,

 

There should be self tests in the existing board support documentation you may run.

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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@austin

 

Thank you, I appreciate that you would get a moderator to help me. I could send them my design if they have a KCU116 board and could simply flash their board with it and tell me if their board's Ethernet PHY comes up?

 

I have looked through the built in test software and documentation and I cannot find a test that specifically targets the Tri Mode Ethernet SGMII PHY.

 

Thank you for your time. I really appreciate it. I may have a faulty board (PHY part) and it is always so hard to determine that to be true, I need to rule out all possible user err, or my error.

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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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@austin

 

I have found a contradiction in the constraint files of two example designs/user guides for the KCU116. This may be causing my issue. I have created my design to follow the pinouts listed in the KCU116 User Guide,UG1239 (v1.0.1) May 15, 2017. The pins were as follows

 

set_property PACKAGE_PIN U24 [get_ports "PHY1_SGMII_CLK_N"] ;

set_property PACKAGE_PIN V26 [get_ports "PHY1_SGMII_OUT_N"] ;
set_property PACKAGE_PIN U26 [get_ports "PHY1_SGMII_OUT_P"] ;
set_property PACKAGE_PIN U25 [get_ports "PHY1_MDC"] ;

 

But the constraints file found in the IPI Tutorial example design XTP460 - KCU116 IPI Tutorial, say other wise.

#set_property PACKAGE_PIN U24 [get_ports {GPIO_DIFF_OUT_LPC_LA_P[8]}]
#set_property PACKAGE_PIN V26 [get_ports {GPIO_DIFF_OUT_LPC_LA_P[9]}]
#set_property PACKAGE_PIN U26 [get_ports {GPIO_DIFF_OUT_LPC_LA_P[4]}]
#set_property PACKAGE_PIN U25 [get_ports {GPIO_DIFF_OUT_LPC_LA_N[8]}]

 

 

 

Now the schematic that I am working with support the pinout listed in the user guide, the first group of signals. Why would this be? It seems very odd to me that the schematic and user guide support one pinout and the IPI Example Design Tutorial supports another.

 

One other odd thin was that one of the tutorials calls out to enter the boards MAC ADDress. ( The XTP458 Board Interface Test)

BUT, the board does not have a MAC ADDRESS written in underneath the actual board LABEL for MAC ADDR. So this is weird to explain without an illustration but, in the actual PCB there is a label that says MAC ADDRESS, but the sticker that is pasted perfectly in that position is blank.

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Scholar austin
Scholar
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Registered: ‎02-27-2008

Re: Defective KCU116 Board

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i,

 

Sounds like early vs latter revision issue.

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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@austin

 

A very simple question to answer, assuming someone has a KCU116 available, is to turn it on, plug something into the RJ45 Port via an ethernet cable - it could be a computer, and see if the Link light turns on. The device connected up to the board would need to be powered on as well to attempt to establish the 1000Base-T Link

 

That would tell me whether the board I have has a Ethernet SGMII PHY that is not working.

 

Also, I have no received any contact from a moderator that you have contacted regarding this issue. This would be immensely helpful in figuring out if my board is not working. 

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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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@austin

 

I am not sure what revision issue you are assuming, but I checked the board target for the IPI design, and it is the same board target as the KCU116 user guide

 


<Option Name="BoardPart" Val="xilinx.com:kcu116:part0:1.0"/>

 

Is there a new revision of this board?

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Scholar austin
Scholar
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Registered: ‎02-27-2008

Re: Defective KCU116 Board

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i,

 

Boards have a revision label or stamp.  Rev A, B, C, etc.  Occasionally it is something like "C3."

 

I have requested folks to look into this for you.

 

Apologies for the delay.  You are correct, just looking at a working board would answer your question about the LEDs on the ethernet jack.  Unfortunately, I do not have that board, nor are any close by me (that I know of).

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
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Re: Defective KCU116 Board

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@austin

 

Thank you very much!

 

 

-Ian Kennedy

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Scholar austin
Scholar
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Registered: ‎02-27-2008

Re: Defective KCU116 Board

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i,

 

I just powered on my XCU102 board, and both leds on the jack are off.  So that pretty much tells me that boards can  ship with a default configuration that does not enable the jack.

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
Adventurer
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Registered: ‎02-17-2017

Re: Defective KCU116 Board

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Did you connect a device, such as a computer tot he board via an ethernet cable. The lights will never go on in the RJ45 connector without a cable and active device on the other side.

 

Also, since I have KCU105 boards as well and they boot up and do light up when connected to a communicating device, I would assume that the boards do ship with an image that make a link.

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Scholar austin
Scholar
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Registered: ‎02-27-2008

Re: Defective KCU116 Board

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You are correct,

 

When I plug it into a network, both leds light up.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Adventurer
Adventurer
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Re: Defective KCU116 Board

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@austin

 

Okay cool. That helps us build a case to say that the board should ship with an image that powers the PHY to a point where it can form a connection. Which my KCU116 board does not do.

 

It would be great to power up another KCU116 somewhere. 

 

Thank you for your help @austin

 

 

Would you be able to ping your network of people who may have a KCU116 to run the same experiment?

 

Thanks,

 

Ian Kennedy

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Scholar austin
Scholar
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Re: Defective KCU116 Board

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...in process as we speak ...

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
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Re: Defective KCU116 Board

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Fantastic! Thank you very much for your help!

 

-Ian Kennedy

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Moderator
Moderator
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Registered: ‎08-10-2007

Re: Defective KCU116 Board

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Hi Ian, if the Board Interface Test (XTP458) is passing for your KCU116 then I would expect the board health is just fine.  There is a situation where SW driver support for both SDK LwIP and Petalinux isn't yet fully read for SGMII-LVDS.  For that reason, this interface cannot be fully supported as of yet on this board.  So, I would classify this as a SW driver limitation, rather than any hardware defect on the KCU116 itself.  (Xilinx Answer 68277) does exist on this issue, which is now being updated, as the most up to date information would be a timeline of 2017.3 for SW driver support, rather than the initial SW version of 2017.1.  The updated version of (Xilinx Answer 68277) should be live on xilinx.com tomorrow (https://www.xilinx.com/support/answers/68277.html).

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Re: Defective KCU116 Board

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@jlarkin

 

And when will 2017.3 be released?

 

 

I cannot get the external PHY device to power on using a design of my own. Could you please take a look at my other thread, this thread was started in an effort to narrow down the issue of the PHY device not powering up properly. I have tried everything I feel is possible with the FPGA HDL design to power on the DP83867ISRGZ device. 

 

Please check out the thread below:

https://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/KCU116-SGMII-Ethernet-PHY-will-not-power-on/td-p/772252

 

If you cannot comment on the issue may you please forward this issue onto someone who may be able to help me. I very much need this interface to continue development.

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Moderator
Moderator
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Registered: ‎08-10-2007

Re: Defective KCU116 Board

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Hello, we expect 2017.3 to be released in early October 2017.

 

I will take a look at the other thread now.

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Adventurer
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Re: Defective KCU116 Board

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To be clear - in the other thread, I am not using any software in my design. I am using only HDL to power and use the SGMII LVDS Phy device on the board - the KCU116

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Adventurer
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Re: Defective KCU116 Board

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@jlarkin Sorry I meant to tag you in my reply ---- 

 

To be clear - in the other thread, I am not using any software in my design. I am using only HDL to power and use the SGMII LVDS Phy device on the board - the KCU116

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Visitor lifeline99
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Registered: ‎06-23-2017

Re: Defective KCU116 Board

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@ik315717  @jlarkin 

Im having exactly the same issue. Trying to get the 1000/100/10 ethernet interface up on my KCU116 and Im unable to get the PHY to power up. No activity/link when plugging in a cable to a known-good switch. Was there a run of bad boards? Is there anyone else out there who has a KCU116 who could try boot the board with the default imagine and cabling up the ethernet interface up to see if the lights come on? Wondering if I need to RMA the board. 

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Visitor trm61
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Registered: ‎06-25-2017

Re: Defective KCU116 Board

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This is not good, as I just ordered this board myself, primarily because I need to learn the Ethernet on it ASAP!.

I have been an ASIC Design Engineer for 18+ years and my job was recently sent to China, and now I need to learn Xilinx tools, SW and HW, and specifically Ethernet, and I need to learn all of this literally in the next month to get hired by a specific business.

 

I have no income and cannot spend this $ if it doesn't even work.

 

Waiting until October is 100% out of the question!

 

This is literally as urgent as it gets :(

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Visitor trm61
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Registered: ‎06-25-2017

Re: Defective KCU116 Board

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@jlarkin Any chance there is a work-around?

If not, I must cancel my order ASAP!

 

Thanks!

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Visitor trm61
Visitor
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Registered: ‎06-25-2017

Re: Defective KCU116 Board

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Well, they confirmed no workaround and that it will not be fixed until 2017.3 :(

Support was very prompt, very helpful and cancelled my order no questions asked.

However, I am very disappointed, as I am loving learning Vivado and all that it does and offers; I am actually amazed by the advancements made over the last 15 years!

I also had my heart set on this board and feature set, and I needed it to work on a project that I could use to demo to get hired by one of a set of companies in a very specific target market I really want to be in.

I really do not want to spend $ on a different board, as nothing is as nice as this one :(

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Visitor lifeline99
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Registered: ‎06-23-2017

Re: Defective KCU116 Board

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Could you share the explanation from Xilinx support? Is it a problem with the 1G MAC IP? 

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Visitor trm61
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Registered: ‎06-25-2017

Re: Defective KCU116 Board

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@lifeline99

I do not know exactly the details, but it doesn't look like a mac issue.

@jlarkin answered earlier in this thread, and also provided a link to the main tracked issue in a couple boards: https://www.xilinx.com/support/answers/68277.html

 

I am just not finding any alternative boards, either, as even the next step up has the same issue, for twice the price.

Though, I cannot justify that much money for just learning.

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Visitor trm61
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Re: Defective KCU116 Board

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@lifeline99  Sorry, they did not provide any further details in my support call, just that it would not be fixed until the next version of Vivado

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