UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Observer nxthuan
Observer
918 Views
Registered: ‎03-14-2018

Flash Programming in ZC706

Hi Fellows,

 

I am setting up the ZC706 PCIe Target Reference Design based on the document ZC706 PCIe TRD User Guide UG963 (v1.1) July 3, 2013. (https://www.xilinx.com/support/documentation/boards_and_kits/zc706/2014_4/ug963-zc706-pcie-trd-ug.pdf)

 

I could boot the Linux by following the Programming the Quad-SPI Flash Memory step in pp. 13. However, I didn't see any window like this when booting the Linux

 

Capture.PNG

I suppose that the Flash booting was failed because I only received Writing Kb: <some values>/<only zero> (100%)

 

OEM: 5344
Name: SS08G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading uEnv.txt
** Unable to read file uEnv.txt **
Copying Linux from SD to RAM...
reading uImage
6668368 bytes read in 567 ms (11.2 MiB/s)
reading devicetree.dtb
13565 bytes read in 15 ms (882.8 KiB/s)
reading uramdisk.image.gz
4427273 bytes read in 382 ms (11.1 MiB/s)
## Booting kernel from Legacy Image at 02080000 ...
Image Name: Linux-4.0.0-xilinx-00001-gbc96ed
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 6668304 Bytes = 6.4 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 04000000 ...
Image Name:
Image Type: ARM Linux RAMDisk Image (gzip compressed)
Data Size: 4427209 Bytes = 4.2 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Ramdisk to 1fbc7000, end 1ffffdc9 ... OK
Loading Device Tree to 1fbc0000, end 1fbc64fc ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.0.0-xilinx-00001-gbc96ed2 (kuldeepd@xhd- 2015.05-17) ) #276 SMP PREEMPT Mon Jan 11 11:25:34 IST 2016
n 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: Zynq ZC706 Development Board
bootconsole [earlycon0] enabled
cma: Reserved 128 MiB at 0x38000000
Memory policy: Data cache writealloc
PERCPU: Embedded 11 pages/cpu @eefd4000 s12672 r8192 d24192 u45056
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260624
Kernel command line: console=ttyPS0,115200 root=/dev/ram rw earlyprintk consoleblank=0 cma=128M
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 893768K/1048576K available (4780K kernel code, 2eserved, 131072K cma-reserved, 139264K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0661310 (6501 kB)
.init : 0xc0662000 - 0xc0996000 (3280 kB)
.data : 0xc0996000 - 0xc09cdf80 ( 224 kB)
.bss : 0xc09cdf80 - 0xc0a022b4 ( 209 kB)
Preemptible hierarchical RCU implementation.
Additional per-CPU info printed with stalls.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
slcr mapped to f0006000
zynq_clock_init: clkc starts at f0006100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 3298534883328ns
timer #0 at f000a000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop... 1332.01 BogoMIPS (lpj=6660096)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x486e38 - 0x486e90
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 proceLogin incorrect
zynq login: sdhci: Copyright(c) Pierre Ossman
Password:
sdhci-arasan e0100000.sdhci: No vmmc regulator found
sdhci-arasan e0100000.sdhci: No vqmmc regulator found
mmc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using ADMA
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
TCP: cubic registered
NET: Registered protocol family 17
can: controller area network core (rev 20120528 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20120528)
can: broadcast manager protocol (rev 20120528 t)
can: netlink gateway (rev 20130117) max_hops=1
Registering SWP/SWPB emulation handler
/wrk/paeg/users/kuldeepd/zynq_pcie_trd/test/new_pcie_trdsys.c: unable to open rtc device (rtc0)
ALSA device list:
mmc0: new high speed SDHC card at address aaaa
mmcblk0: mmc0:aaaa SS08G 7.40 GiB
mmcblk0: p1
No soundcards found.
Freeing unused kernel memory: 3280K (c0662000 - c0996000)
INIT: version 2.88 booting
FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
Creating /dev/flash/* device nodes
random: dd urandom read with 1 bits of entropy available
Starting internet superserver: inetd.
update-rc.d: /etc/init.d/run-postinsts exists during rc.d purge (continuing)
Removing any system startup links for run-postinsts ...
/etc/rcS.d/S99run-postinsts
Erasing blocks: 1/50 (2%)random: nonblocking pool is initialized
Erasing blocks: 50/50 (100%)
Writing data: 6365k/0k (100%))
Verifying data: 6365k/0k (100%))
Erasing blocks: 51/51 (100%)
Writing data: 6512k/0k (100%))
Verifying data: 6512k/0k (100%))
Erasing blocks: 1/1 (100%)
Writing data: 17k/0k (100%)
Verifying data: 17k/0k (100%)
Erasing blocks: 34/34 (100%)
Writing data: 4323k/0k (100%))
Verifying data: 4323k/0k (100%))
INIT: Entering runlevel: 5Login incorrect

 

Please let me know your solution.

Thank you very much.

0 Kudos
3 Replies
Moderator
Moderator
883 Views
Registered: ‎04-12-2017

Re: Flash Programming in ZC706

Hello @nxthuan,

 

Are you running ready to burn images or building the design again ?

Can you please confirm if you are following the exact steps and using the exact same tools as well as system configuration ?

 

I will request you to re-try the design steps and check the default board settings and jumper settings to confirm.

 

thank you.

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos
Observer nxthuan
Observer
872 Views
Registered: ‎03-14-2018

Re: Flash Programming in ZC706

Hi @kvasantr,

 

I run the ready to burn image provided by https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html#documentation

 

I followed the exact steps provided by ZC706 PCIe Targeted Reference Design (ISE Design Suite 14.3), pp. 12 -15

 

============================

Extracting the Project Files -> OK

============================

The Zynq-7000 PCIe Targeted Reference Design files are located in zynq_pcie_trd_14_3.zip This file is available for download online at: http://www.xilinx.com/zc706 (listed under the Docs & Designs tab)
To extract the files: 
1. Download
zynq_pcie_trd_14_3.zip to a working directory on the control
computer.
2. Unzip the files contained in
zynq_pcie_trd_14_3.zip.

 

============================

Programming the SD Card -> OK

============================

On the control computer:
1. Plug the SD card into the SD card receptacle.
2. Navigate to the working directory
zynq_pcie_trd_14_3/prog_qspi and copy BOOT.bin, zc706_pcie_trd.bin, devicetree.dtb, devicetree_qspi.dtburamdisk.image.gz, uImage, init.sh to the SD card. The BOOT.bin file enables the PS to boot in the SD boot mode. The zc706_pcie_trd.bin file contains the TRD bitstream. The remaining files are required for Linux boot-up. 

3. Unmount and remove the SD Card from the computer and insert the it into the SD card receptacle on the ZC706 board (Figure 2-1).

 

============================

Programming the Quad-SPI Flash Memory

============================

This procedure programs the Quad-SPI flash memory with files from the SD card to run the Zynq-7000 PCIe TRD.
1. Complete the communications setup in
Appendix A, Setting Up Board Communications -> OK
2. Power off the ZC706 board (SW12).  -> OK
3. Verify the SD Card is plugged into receptacle J30
 -> OK
4. Connect the ZC706 board to the control computer and power supply
.  -> OK

5. Set DIP switch SW11 00110.  -> OK

6. Power ON the control computer and start TeraTerm Pro using 115200 bits/s, 8 data bits, None parity, 1 stop bit, None flow control.  -> OK
7. Power ON the ZC706 board (SW12). The
init.sh script in the SD card loads the Quad-SPI flash memory with zc706_pcie_trd.bin and the Linux kernel images. Initialization progress is shown on the TeraTerm Pro display.  -> OK

8. Initialization is complete when the zynq> prompt appears on the TeraTerm Pro display.  -> OK. I used the root's ID and password.
9. Navigate to the zynq_pcie_trd_14_3/sd_image folder and copy qt_lib.imginit.sh, zynq_pcie_qt and zynq_pcie_qt.sh files to the SD card used to program the QSPI device. These files are required for loading the Zynq-7000 PCIe TRD. Insert the SD card into the SD card slot.  -> I plugged out the SDCard to copied other files, and then plugged in again.

10. Set DIP switch SW11 00010.  -> OK 

 

However, when I turn off the board, plugged out the SDCard, and turn on the board again, it couldn't boot the OS.

 

Thanks,

0 Kudos
Observer nxthuan
Observer
866 Views
Registered: ‎03-14-2018

Re: Flash Programming in ZC706

Hi @kvasantr,

 

Last time, I tried a ready to burn image (with the selection of board rev 2.0 and Vivado Design Suite 15.4), but the OS couldn't loaded into QSPI flash.

 

I tried with another ready to burn image (with the selection of board rev 1.1 and ISE Design Suite 14.7 https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html#documentation), and it was OK now.

 

Is there any hardware difference (board schematic, ISE/Vivado block design, ...)? I also noticed that the zc706_pci_trd.BIN in the first sample (test FAILED) was only 6.6 MB, whereas zc706_pcie_trd.bin in the second sample (test OK) was 13.4 MB.

 

Thanks,

Thuan 

0 Kudos