Getting started with ise on a SP601 board

[leoxiii]

I just bought a SP601 development board with the intent of learning the ise system and make simple

fpga designs. What I look for is a tutorial with a instructional example for my card.

Nothing that came with the labcard was useful or contained the source code.

By searching on the web I found a document:  "ISE In-Depth Tutorial" where a stopwatch is developed from scratch.

This looked good but it seems like the files are not for my board.

It says:This design targets a Spartan™-3A device; however, all of the principles and flows taught
are applicable to any Xilinx® device family, unless otherwise noted.

I suppose this means that I cannot use the source files as they come for my card.

So my question is: Is there any tutorial at all which targets the card that I have bought. If so please

share the link!

Thanks

Dan Synek

[mcgett]

Example designs for the SP601 can be found on the SP601 documentation page

http://www.xilinx.com/sp601

[leoxiii]

Dear mcgett,

Thanks for taking interest in  my question. I had of course  looked at this page. As far as I can see there is no tutorial even remotely useful for a beginner with the Webpack software.

Here is a list of the documents referred to from the SP601 Documentation page and my understanding of their content:

Installing SP601 ISE® WebPACK™ Software
   This contains instructions for installing the software.
   I did that and my software is now installed.

* Hardware Setup Guide
   My hardware is correctly setup.

* Getting Started with the Xilinx Spartan-6 FPGA SP601 Evaluation Kit
   This doument contains instructions (again) on how to install
   the software. It also contains instructions on how to run a
   fancy image analysis Flash demo. It is pretty but not very helpful.
   There is no info on how o compile or build the flash demo(which
   is probably just as well since it seems too complicated for a
   first example anyway)

 
Therer are also some specialized documents which do not seem useful
as a firstr example of using the Webpack software(please correct me if
I am wrong)

# SP601 MultiBoot Design

# SP601 MIG Design Creation

# SP601 Restoring Flash Contents

These are all the documents I could find. What I am looking for is a tutorial that explains how to compile a simple

VHDL definition, download it to SP601 card and run it. If Xilinx do not provide any such document (which surprises me)

are there then any other providers whoi can help get me started?

Dan Synek

[amandaw]

You may be interested in the ISE Documentation found here: http://www.xilinx.com/support/documentation/dt_ise12-1_tutorials.htm

[leoxiii]

This is just the kind of documents i would love to start from. However, when I read them it says:

5. Select the following values in the New Project Wizard—Device Properties page:
♦ Product Category: All
♦ Family: Spartan3A and Spartan3AN
♦ Device: XC3S700A
♦ Package: FG484
♦ Speed: -4
♦ Synthesis Tool: XST (VHDL/Verilog)
♦ Simulator: ISim (VHDL/Verilog)
♦ Preferred Language: VHDL or Verilog depending on preference. This will
determine the default language for all processes that generate HDL files.

Since SP601 is build on the Spartan 6 family and not 3 will these examples work for me.

I would hate to get stuck on ununderstandable error messages because I am using old

tutorials for new architectures. If someone knowledgeable could please (please!) 

acknowledge that I can use these tutorials for my new SP601 lab card I am

going to spend the next weeks getting into them.

Thanks for your help  amandaw. I appreciate it!

Dan Synek

[lisafu]

If you only learn to use ISE, or ISE Webpack, (without using iMPACT) you can follow this Spartan-3 example without problem. You can do "Synthesize", "Implement Design" and "Generate Programming File". SP601 has Spartan-6 (lx16), if you want to build image for SP601, you have to select the following:

♦ Device: XC6SLX16

♦ Package: FT(G)256

♦ Speed: -2
Unfortunately, the example is for Spartan-3. You'd better to create your own design for Spartan-6 to generate programming file.

I have just been through this procedure without proper demo for SP601.

Goodluck for you!