UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Adventurer
Adventurer
826 Views
Registered: ‎08-30-2018

How to perform Flash Programming of the ZC706 with our own design files and bitstream?

Jump to solution

Hi friends,

 

I am working with Vivado 2017.3 targeting a ZYNQ ZC706 board.

 

I followed the procedure for flash programming of the ZC706 through SD Card in page 13 if this document, and I could successfully see the Xilinx Device in lspci of the Ubuntu terminal.

 

Now, I am wondering how can I program the Flash memory of the ZC706 with my own design file, bitstream? There is no explanation for that in the documentation.

 

Kind replies and helps are in advace appreciated.

 

 

 

Besrs,

Daryon

 

1 Solution

Accepted Solutions
Highlighted
Adventurer
Adventurer
739 Views
Registered: ‎08-30-2018

Re: How to perform Flash Programming of the ZC706 with our own design files and bitstream?

Jump to solution

Hi all,

I found the solution. The problem is due to the sequence of the imported files while creating the image file. Going this link could answer my problem.

 

Bests,

daryon

3 Replies
Moderator
Moderator
801 Views
Registered: ‎04-12-2017

Re: How to perform Flash Programming of the ZC706 with our own design files and bitstream?

Jump to solution

Hello @daryon,

 

To create boot-able image for on board flash you need to use SDK tool.

Please refer following link for step by step guide and to get the list of files required to create boot able image.

http://xilinx.wikidot.com/zc702-boot-from-flash

 

Please note there might be minor changes into the latest SDK version in terms of GUI options.

 

Thank you

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos
Adventurer
Adventurer
784 Views
Registered: ‎08-30-2018

Re: How to perform Flash Programming of the ZC706 with our own design files and bitstream?

Jump to solution

Hi @kvasantr,

 

Thanks for your reply and link. I did the following steps:

 

1. Implemented design in vivado and generated bitstream

2. export hardware including bitstream and launch sdk

3. Create new application with Zynq FSBL (figure below)

 

Screenshot from 2018-10-18 10-16-06.png

 

4. From Xilinx/ Create Boot Image, I have defined the path for the new boot file and named it BOOT.bif.Then I added the other files from this link. I doubt that I did a good job at this step or not?! I assumed that the files in this link are pre-built by Xilinx to bring up the processor and they're design independent! So, I just copied them for my design (figure below).

 

Screenshot from 2018-10-18 10-46-01.png

 

5.SDK Console reported the successful job by bootgen(figure below)

 

Screenshot from 2018-10-18 10-47-29.png

 

6. The BOOT.bin file was generated beside my other files (figure below)

 

Screenshot from 2018-10-18 11-05-07.png

 

7. Then according to your link, I executed the following commands in XSCT Console and loaded my BOOT.bin file into the ARM processor, Core #0.

 

xsct% connect   

xsct% targets
  1  APU  
     2  ARM Cortex-A9 MPCore #0 (Running)
     3  ARM Cortex-A9 MPCore #1 (Running)
  4  xc7z045
  5  whole scan chain (board power off)

xsct% targets 2 

xsct% dow -data BOOT.bin 0x08000000                                             
100%   28MB   0.5MB/s  00:55                                                    
Successfully downloaded /home/mostafa/Documents/Xilinx/test_designs/ZYNQ_zc706/ZC706_PCIe/ZC706_PCIe.sdk/upload/BOOT.bin

xsct% 

In the next step when downloding the u-boot.elf file, I received this message:

 

xsct% dow u-boot.elf                                                            
Downloading Program -- /home/mostafa/Documents/Xilinx/test_designs/ZYNQ_zc706/ZC706_PCIe/ZC706_PCIe.sdk/upload/boot_image/u-boot.elf
	section, .text: 0x04000000 - 0x040422db
	section, .rodata: 0x040422dc - 0x04051bec
	section, .hash: 0x04051bf0 - 0x04051c1b
	section, .data: 0x04051c1c - 0x040541af
	section, .got.plt: 0x040541b0 - 0x040541bb
	section, .u_boot_list: 0x040541bc - 0x04054aa3
	section, .rel.dyn: 0x04054aa4 - 0x0405df6b
	section, .bss_start: 0x04054aa4 - 0x04054aa3
	section, .bss: 0x04054aa4 - 0x046a991f
	section, .bss_end: 0x046a9920 - 0x046a991f
100%    0MB   0.5MB/s  00:00                                                    
Setting PC to Program Start Address 0x04000000
Successfully downloaded /home/mostafa/Documents/Xilinx/test_designs/ZYNQ_zc706/ZC706_PCIe/ZC706_PCIe.sdk/upload/boot_image/u-boot.elf
xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Stopped at 0xffffff28 (Suspended)
__image_copy_start() at arch/arm/lib/vectors.S: 51
51: couldn't open "/scratch/skarandikar/fpga-zynq-staging_zctest/common/u-boot-xlnx/arch/arm/lib/vectors.S": no such file or directory
xsct% con                                                                       
Info: ARM Cortex-A9 MPCore #0 (target 2) Running                                
xsct%                                                                           

So, I supposed that my program was written into the processor, so I turned off the board and host PC, inserted the zc706 inside the PCI bus of the PC motherboard, then reastarted both zc706 and PC. When execusing lspci, the ZC706 was not recognized bt the host PCIe bus.

 

Am I doing something wrong? Unfortunately, the exampled inside the internet are very limited and vague! Can you please help me by this issue?

 

Thanks and Regards,

Daryon

Highlighted
Adventurer
Adventurer
740 Views
Registered: ‎08-30-2018

Re: How to perform Flash Programming of the ZC706 with our own design files and bitstream?

Jump to solution

Hi all,

I found the solution. The problem is due to the sequence of the imported files while creating the image file. Going this link could answer my problem.

 

Bests,

daryon