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11,928 Views
Registered: ‎04-03-2008

JTAG connector pins

why Platform Cable USB II and Xilinx Parallel Cable IV assignment pins differents than 14 pin Jtag standard pin assignment (like showed in  http://hri.sourceforge.net/tools/jtag_faq_org.html#_Toc63218715 ) , are they realy different ? if yes is there custom adapter converts this 14 pin to the standard 20 pin ?
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Xilinx Employee
Xilinx Employee
11,914 Views
Registered: ‎01-03-2008

Re: JTAG connector pins

There is no "standard JTAG connector" definition.  The sourceforge site didn't use this term either and called it the "usual JTAG header pinout". 

The pinout definition for Xilinx cables (PC4, USB, USB II) are consistent, but there are very likely differences with the many JTAG cables that are available from many companies.

Ed
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11,893 Views
Registered: ‎04-03-2008

Re: JTAG connector pins

does this differences are in pins locations or even reach debbuger protocole
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Xilinx Employee
Xilinx Employee
11,871 Views
Registered: ‎01-03-2008

Re: JTAG connector pins

JTAG is an IEEE standard that defines a low level basic protocol with 4 mandatory pins (TDI, TDO, TMS, TCK) and 1 optional pin (TRST).  The connector style/pinout/etc (if there even is one) is irrelevant so long as the protocol is followed.

How someone communicates to the physical JTAG chain is not defined so there are many different implementations and software drivers/APIs for each physical implementation. 
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