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Adventurer
Adventurer
783 Views
Registered: ‎11-16-2017

KC105 Interface Test

Hello, Everyone!

I recently purchased the KCU105 FPGA board and wanted to do the Example Design, which is "XTP345 Interface Test". However, I followed all the steps and "KCU105 Software Install and Board Setup", but I still met the following question. Also, the software I downloaded are all latest version. Can anyone help me with that ? Thank you!Interface Test.PNG

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3 Replies
Xilinx Employee
Xilinx Employee
741 Views
Registered: ‎02-14-2014

Re: KC105 Interface Test

Hi @yzzhsx12345,

 

Have you checked for possible causes of this issue in Appendix section of XTP345 -

https://www.xilinx.com/support/documentation/boards_and_kits/kcu105/2014_4_1/xtp345-kcu105-bit-es3-2014-4-1.pdf

Regards,
Ashish
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Adventurer
Adventurer
716 Views
Registered: ‎11-16-2017

Re: KC105 Interface Test

Thank you! I have rechecked the steps of Appendix and setup again, the problem is still there. By the way, I tried to use the Vivado Hardware Manager to test the PC-board JTAG connectivity, but it appears the following warning, should I download and use the previous version of Vivado ?

Thank you!Capture.PNG

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Moderator
Moderator
634 Views
Registered: ‎10-19-2011

Re: KC105 Interface Test

This warning is only a general warning. If you have an ILA or MIG core that you are trying to communicate with you need to use the versions that the design was built with. If the core was built in 2016.4 and you are using 2017.3, this might cause issues. We recommend using the version of the tools the core was generated with.

 

As for the BIST, this issue could be a driver problem. Make sure that you also turned off your virus protection and firewall as they can limit the connectivity to UART. 

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