01-25-2010 01:27 PM
Hi,
According to the family overviews for Virtex 5 and Virtex 6, the FPGAs that come with those evaluation boards supports up to 4 ethernet MACs.
However, the evaluation boards only have 1 tri-speed PHY and 1 SFP connector.
How can I test a design that needs 4 physical ethernet connections on the ML505 or ML605 evaluation board?
Thanks!
YeeMan
01-25-2010 08:00 PM
01-25-2010 08:00 PM
05-30-2011 05:21 AM
Hi, recently I want to do something with SFP module, and I have the ML505 board, I want to ask where to download the sfp design .zip files? Thank you !