cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Anonymous
Not applicable
5,315 Views

ML555:DDR2 SDRAM controller (vhdl)

Hi,

We have purchased ML555 Board from xilinx.

we want to modify the ddr2 controller in order to suit with our current design .

1-/ we have seen verilog files for the ddr2 controller provided in the CD.Unfortunately we works with VHDL language, where can I get the VHDL files?

 2-/ What is the freq max when running the controller?  knowing that the ml555 fpga has a speed grade of 1. 

 

regards,

 

 

0 Kudos
Reply
1 Reply
barryabrown
Explorer
Explorer
5,303 Views
Registered: ‎09-11-2007

1. Run the Memory Interface Generator (MIG) in CoreGen.  Choose VHDL.

2. I believe it is 333.  The MIG will tell you.  Also see XAPP858.

0 Kudos
Reply