10-24-2014 07:00 AM
Hi all,
as part of a research project, I am looking for FPGA boards that have large amounts of DDRn and Flash memory. In the order of tens of GB (for DDRn). Is there anything available from Xilinx or third-party, or I would have to resort to custom board design?
Any help would be greatly appreciated.
10-24-2014 07:20 AM
HI
There are no boards from Xilinx which have tens of GB of Memory or from third party.
You have to design your own board.
10-24-2014 07:41 AM - edited 10-24-2014 07:48 AM
Hi,
Xilinx do not have a board with ten of GBs but there is no hardware restriction to support it.
With MIG I think you can go till 16GB with custom part, but you need to figure out memory chips for your requiremenet or you can get tens of GBs with multiple SODIMMs or DDR3 s connected in parallel and can interfae using multi controller design
Please refer UG586 for board design guideliness and IP usage.
Also go through related discussion
http://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/VC707-or-KC705-DDR-size-extention/td-p/259816
10-24-2014 07:59 AM - edited 10-24-2014 08:02 AM
http://www.xilinx.com/products/boards-and-kits/EK-V7-VC709-CES-G.htm#vc709board
Has two sockets for 8 GBytes....
VC709 connectivity kit
Or, look through other suppliers:
http://www.xilinx.com/products/boards-and-kits/1-3Y60YJ.htm
has 16 GBytes....
10-27-2014 05:02 AM
Hi,
just a weird alternative proposal:
If you just need lots of memory, why dont you use a FPGA-card with PCIe interface and plug it into a Server Mainboard with the required ammount of RAM?
Of course it depends on your project requirements, wether this is a useful approach to you or not.
Have a nice synthesis
Eilert
10-27-2014 06:44 AM
Hi,
One possible solution is to use the MIT/Intel AWB/LEAP environment, rather than attempt to create a custom board.
http://asim.csail.mit.edu/redmine/projects/leap/documents
LEAP has a bunch of services, including support for memory hierarchies and cache coherent memory access. You can connect multiple VC707 boards using a PCIe bus, and utilize all the DRAM available on your FPGAs and you host system.
The AWB environment allows you to manage complex hardware/software projects, as well.
There are some example leap-workloads that show how to partition a problem across multiple FPGAs (e.g. 2D heat transfer).
Regards,
Elvis Dowson