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Visitor nav666
Visitor
17,275 Views
Registered: ‎01-12-2012

Not able to get ac97 audio output from Atlys board

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I am trying to get audio output from Atlys board (uses LM4550 audio codec). I got the ac97_controller.v core file which generates the serial o/p for the codec.

I only want to send a square wave and i wrote top module for that. It sends the square wave audio PCM samples(2's complement and 18 bit). I also wrote logic to unmute the headphone & line_out o/p. Even post-route simulation looks perfect. But when i download it to Atlys board, it doesn't work. Can anybody tell what might be the problem. Thanks in Advance.

P.S. I checked the audio codec with demo project for AC97 from www.digilentinc.com and it works, the file ac97_controller is in there.

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Visitor nav666
Visitor
21,214 Views
Registered: ‎01-12-2012

Re: Not able to get ac97 audio output from Atlys board

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Finally figured it out !!

To get the sound out of the codec, one needs to follow the path from the input of the codec to line-out or HP-out.

And have to configure every register (or mux) which comes in the path.

Actually one MUST follow the Block diagram on 2nd page of LM4550 datasheet.

 

Following are the steps i used:

1) If we look at the block diagram the registers which come in the path are:

     a) 2Ch (DAC sample rate convertor reg)

     b) 18h (PCM-out vol reg)

     c)  20h (General purpose reg)

     d)  0Ch (Phone vol reg)

     e)  0Ah (PC_beep vol reg)

     f)   02h (Master vol line-out)

     g)  04h (HP-out vol)

 

2) We need not to write 2Ch (use its default value), then unmute 18h.

3) We need to select POP and disable national 3D sound, write 20h register to do that.

4) Unmute 0Ch so that phone  does not add in to MIX2, one need not to unmute 0Ah (its mute by default).

5) Unmute 04h and 02h.

 

If one wants to get the sound into the CODEC from  line-in and then to Controller and put back the samples into frame to play that sound, you have to follow the path and write the corresponding registers.

In this case, you have to write 1Ah(record select register) to select line-in, and unmute 1Ch(record gain register). You need not to write 32h(DAC sample rate convertor).

 

Also, one can loopback in line-in to output without encountering DACs or ADCs, you have to select 10h (for line-in).

Also u need not to write 20h (by deafult it selects national 3D sound).

(Actually i was confused at that for a long time cuz i didnt follow the block diagram...!! )

 

Finals notes: For those who use ac97_controller.v file, one needs to do some correction:

on last always block, you need to use always @(BIT_CLK) but they have used SYS_CLK.

Using SYS_CLK also work there is noise in the final sond when you hear it.

(Probably due to the clock-domain crossing of SYS_CLK and BIT_CLK).

 

Hope it helps every one new!!

 

I am marking this as a solution and thanks everyone who participated in the discussion.

 

23 Replies
Xilinx Employee
Xilinx Employee
17,264 Views
Registered: ‎08-02-2011

Re: Not able to get ac97 audio output from Atlys board

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First shot in the dark, are you sure your .ucf is correct?

www.xilinx.com
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Visitor nav666
Visitor
17,259 Views
Registered: ‎01-12-2012

Re: Not able to get ac97 audio output from Atlys board

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I think that .ucf is correct.(attached)

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Scholar joelby
Scholar
17,247 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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Can you probe the (external) AC'97 codec signals with an oscilloscope or logic analyser and confirm that they're within spec?

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Visitor nav666
Visitor
17,244 Views
Registered: ‎01-12-2012

Re: Not able to get ac97 audio output from Atlys board

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Thanks for replying. Oscilloscope and logic analyzer are not accessible for me right now. Is there any other way??

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Scholar joelby
Scholar
17,232 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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If you have a ChipScope Pro license, you could use that instead of a logic analyser, as long as your UCF constraints are correct.

 

The only other thing I can think of to suggest is comparing (perhaps with ChipScope Pro) the exact command sequence that the reference design sends to unmute the volume channels etc., just to make sure that you're sending everything in the right order. If the codec supports it (it's been a while since I read the document), you could also try reading back the volume registers to make sure that the values have been received - it's often good to do this to confirm that the peripheral you're talking to is actually there.

 

 

Visitor nav666
Visitor
17,215 Views
Registered: ‎01-12-2012

Re: Not able to get ac97 audio output from Atlys board

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I am able to view the signals from the codec by chipscope. I can read the value of the volume registers from codec to whatever value i wrote in earlier frame. But it doesn't produce the beep with the square wave in send, i dont know why. The only thing remaining is the PCM format (18 bit) i guess.

I use 2's complement format.  {18'h1FFFF,2'b00} for positive sample and {18'h20001,2'b00} for negative sample (for 18 bit PCM, last two bits are supposed to be zero in 20 bit slot)

Any suggestions please??

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Scholar joelby
Scholar
17,189 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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The only thing I can suggest is to log some of the PCM signals generated by the test application, if it can generate square waves or similar, and to try playing these. Perhaps your alternating sample pattern is generating a frequency too high for you to hear? Or maybe the bit format is wrong?

Highlighted
Visitor nav666
Visitor
21,215 Views
Registered: ‎01-12-2012

Re: Not able to get ac97 audio output from Atlys board

Jump to solution

Finally figured it out !!

To get the sound out of the codec, one needs to follow the path from the input of the codec to line-out or HP-out.

And have to configure every register (or mux) which comes in the path.

Actually one MUST follow the Block diagram on 2nd page of LM4550 datasheet.

 

Following are the steps i used:

1) If we look at the block diagram the registers which come in the path are:

     a) 2Ch (DAC sample rate convertor reg)

     b) 18h (PCM-out vol reg)

     c)  20h (General purpose reg)

     d)  0Ch (Phone vol reg)

     e)  0Ah (PC_beep vol reg)

     f)   02h (Master vol line-out)

     g)  04h (HP-out vol)

 

2) We need not to write 2Ch (use its default value), then unmute 18h.

3) We need to select POP and disable national 3D sound, write 20h register to do that.

4) Unmute 0Ch so that phone  does not add in to MIX2, one need not to unmute 0Ah (its mute by default).

5) Unmute 04h and 02h.

 

If one wants to get the sound into the CODEC from  line-in and then to Controller and put back the samples into frame to play that sound, you have to follow the path and write the corresponding registers.

In this case, you have to write 1Ah(record select register) to select line-in, and unmute 1Ch(record gain register). You need not to write 32h(DAC sample rate convertor).

 

Also, one can loopback in line-in to output without encountering DACs or ADCs, you have to select 10h (for line-in).

Also u need not to write 20h (by deafult it selects national 3D sound).

(Actually i was confused at that for a long time cuz i didnt follow the block diagram...!! )

 

Finals notes: For those who use ac97_controller.v file, one needs to do some correction:

on last always block, you need to use always @(BIT_CLK) but they have used SYS_CLK.

Using SYS_CLK also work there is noise in the final sond when you hear it.

(Probably due to the clock-domain crossing of SYS_CLK and BIT_CLK).

 

Hope it helps every one new!!

 

I am marking this as a solution and thanks everyone who participated in the discussion.

 

Scholar joelby
Scholar
17,137 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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Excellent work! Thanks for sharing your findings - I'm sure this will be very useful to others.

 

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Visitor mtechvlsi
Visitor
13,549 Views
Registered: ‎07-08-2012

Re: Not able to get ac97 audio output from Atlys board

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Can you please provide me the ac97_controller.v core file which you got from  www.digilentinc.com ?

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Scholar joelby
Scholar
13,547 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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Weren't you able to find it on Digilent's site? Look on the Atlys page and download the one labelled "This zip file contains an EDK demo project that illustrates how to use the AC97 codec on the Atlys board with Microblaze". The file will be buried somewhere deep within the directory tree, so use your computer's file manager's search facility.

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Visitor mtechvlsi
Visitor
13,546 Views
Registered: ‎07-08-2012

Re: Not able to get ac97 audio output from Atlys board

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Couldn't find  ac97_controller.v.....

The error has been attached here...

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Scholar joelby
Scholar
13,545 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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Not quite - you have to find the file in the example code I told you to download, and then add that source file to your project.

12,929 Views
Registered: ‎02-27-2013

Re: Not able to get ac97 audio output from Atlys board

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Can you send me ac97_controller.v file. I need it for my project. Thanks in advance.

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Historian
Historian
12,919 Views
Registered: ‎02-25-2008

Re: Not able to get ac97 audio output from Atlys board

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@pranyaanandan wrote:

Can you send me ac97_controller.v file. I need it for my project. Thanks in advance.


No, but per joel's suggestion you can download it. SHEESH.

----------------------------Yes, I do this for a living.
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12,910 Views
Registered: ‎02-27-2013

Re: Not able to get ac97 audio output from Atlys board

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I have tried it anyway thank you.

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Visitor amar.ece406
Visitor
12,287 Views
Registered: ‎08-14-2013

Re: Not able to get ac97 audio output from Atlys board

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Problem:        i want to send analog signal to codec and then to controller(fpga) and then the samples are to be send to line out. But i found the music signal is looping back without adc and dac by going form line in to line out. 

1.write reset(0x00) all 0s

2. write record select(0x1A) select line in

3. write record gain(0x1C)unmuted

4.write master volume(0x02)unmuted

 is it necessary to mute line in volume to avoid loop back?

I tried by muting line in volume

5. line in mute

6.pcm volume unmuted

i send music signal to line in which goes to ADC ( digital data in slots 3,4 from codec in SDATAIN  through record select and record gain) from which data goes to ac97 controller(fpga). The data in slots 3,4 of SDATAIN i kept back in slots 3,4 of SDATA out which goes to DAC and then to Line out.

I expected music signal out of LINE out .BUT huge noise was coming.CAn u please suggest why this problem

 

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Visitor amar.ece406
Visitor
12,283 Views
Registered: ‎08-14-2013

Re: Not able to get ac97 audio output from Atlys board

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i am using audio codec in vertex5 for playing music file. i gave music input to line in and want to observe output through line out using "loop back" i.e without using any ADC and DAC. so i think  following steps are necessary according to ur solution

1. unmute master volume

2. unmute line in volume

Is it necessary to write record select and unmute record gain for loop back the music signal .why asked this because even for loop back the audio signal from line in to line out "record select and record gain " are not necessary to write  according to block diagram in vertex5. But without writing  these i am not getting the audio signal loop back to line out. Why is it so

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Visitor arkadip89
Visitor
12,037 Views
Registered: ‎10-22-2013

Re: Not able to get ac97 audio output from Atlys board

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hi everyone,

i have wrote ac97 codec controller for my xilinx vertex5 ml501 evaluation board.i have wrote my codec in VHDL language by following the linc http://http://tristesse.org/FPGA/DigilentAtlysResources

my Queary is after downloading the code in vertex 5 board how i check the controller is working properly or not??
I am trying to get audio output from codec..what is the proper way to get this.....and how I only want to send a square wave in codec...plz help me......thanx in advance

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Visitor arkadip89
Visitor
6,337 Views
Registered: ‎10-22-2013

Re: Not able to get ac97 audio output from Atlys board

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mr. amar.ece406

 how i gave music input to line in and want to observe output through line out using vertex 5 ml 501 board...plz help sir

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Scholar joelby
Scholar
6,331 Views
Registered: ‎10-05-2010

Re: Not able to get ac97 audio output from Atlys board

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Probably best to start a new thread - this one is pretty old (forum policy seems to be to create new threads for new topics) and was about the Digilent Atlys rather than the ML501.

 

If you're not getting any output, you should check some of these things:

  • UCF file - will need to be completely different for the ML501. Make sure your pins are right.
  • Clocking - the Atlys code might assume a particular clock rate and the codec might have certain clocking specifications.. if the ML501's system clock runs at a different speed you may need to change the design accordingly.
  • Have you simulated the design successfully? Always simulate first - you should have a test bench and a simple model for the codec.
  • If you're sure the design is right, and if you have a license for it, you could use ChipScope Pro to capture what's going in and out of the codec.
  • Have you already modified the design to send a square wave to the codec? Are you sure you're sending the right thing? (and have you verified it in simulation?)

 

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Visitor fpgarolf
Visitor
5,129 Views
Registered: ‎09-20-2014

Re: Not able to get ac97 audio output from Atlys board

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Just to add some information who run into the same problem:

 

The Atlys is not able to control the clock of the Codec but has to sample it to interchange data. Configuration is not that critical but audio data is. The Codec provides a 12.280 MHz clock to the FPGA called bit clock which is in phase with the audio data.

 

The given way to synch this is, to sample it with e.g. 50MHz and provide new data to the core with the rising edge of bit clock quickly enough, to be ready when the edge falls again.

 

From a german forum I picked up the idea to synchronize the FPGA system totally to this bitclock by configuring a 50 MHz crystal (ATLYS) with a 29/59 MUL/DIV configuration which is more or less exactly the S/PDIF clock.

 

http://www.mikrocontroller.net/topic/322113#3588999

 

The crystal can be controlled with a voltage controlled capacitor changing the load according to the bitclock edges.

 

When doing this the FPGA gets totally in phase as soon as the CODEC is configured and running.

 

 

 

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Xilinx Employee
Xilinx Employee
5,118 Views
Registered: ‎08-01-2012

Re: Not able to get ac97 audio output from Atlys board

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This forum post is very old and created long time back (in the year of 2012).

Please do not post any further replies for this forum post. If there is are any follow on questions with regards to this issue please post a new query.

 

________________________________________________

Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer.

Give kudos to this post in case if you think the information is useful and reply oriented.

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