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Visitor
Visitor
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Registered: ‎03-02-2011

ODT usage for Spartan6 FPGA

I went through SP605, SP601 and Avnet Spartan 6 LX150T Development Board reference designs and saw that external 50 ohm terminations are used on address pins of DDR devices (SP605, SP601). I Avnet Spartan 6 LX150T Development Board no external terminations are used. Is there a problem with ODT usage fro Spartan6 devices?

 

Thanks in advance

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Instructor
Instructor
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Registered: ‎07-21-2009

ODT usage for DDR2, DDR3 designs

I went through SP605, SP601 and Avnet Spartan 6 LX150T Development Board reference designs and saw that external 50 ohm terminations are used on address pins of DDR devices (SP605, SP601).

This is correct design practice.

I Avnet Spartan 6 LX150T Development Board no external terminations are used.

I suspect you are mistaken about the Avnet S-6 LX150T board design having no terminations for the DRAM address signals.

 

In DDR2 or DDR3, there is no ODT (on-die-termination) for the address/command group of signals.  Standard practice for these signals is 50-ohm parallel termination to VTT (0.9V termination supply for 1.8V DDR2, 0.75V for 1.5V DDR3).

 

ODT is only for the byte lane signals:

  • DQ
  • DQS diff pair
  • DM

Is there a problem with ODT usage fro Spartan6 devices?

I suspect not.

 

-- Bob Elkind

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