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Newbie theproject
Registered: ‎03-01-2012

Piggybacking Xilinx Spartan-3 eval board JTAG


I have a Spartan 3A starter board (HW-SPAR3A-SK-UNI-G) with the XC3S700A FPGA.  I’d like to use its on-board USB JTAG interface to connect with external devices, namely the Spartan 3E XC3S500E-PQG208 and the XC95108 CPLD.  In iMPACT, a scan of the JTAG chain results in a random number of devices being detected, which are labeled “unknown bypass,” if the chain scan stops at all.  The external chips are confirmed to work stand-alone in another jig.


JTAG Chain Configuration:

  • JTSEL to +5V – to inhibit on-board loopback
  • TMS, TCK in parallel
  • [eval J23 open >> eval FPGA >> eval PROM XCF04S >> eval J17 FX2 expander connector, B3] >> TDI of external device, TDO >> [eval J17 FX2 expander connector, A5]


Test Results:

  • connecting the TDI and TDO from the eval board cause normal operation
  • swapping TDI and TDO in exasperation lead to the JTAG chain failing with “error message”  (yes, chips tested ok afterward)



Thoughtful suggestions appreciated.

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Xilinx Employee
Xilinx Employee
Registered: ‎09-22-2008

Re: Piggybacking Xilinx Spartan-3 eval board JTAG

We suppose to be not connect external devices in the JTAG chaing of Spartan-3A evalution board.


It seems to be the JTAG chaing connections loo is not proper. Plese refer configuration guide for more details

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