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Observer mostafa@sint
Observer
289 Views
Registered: ‎01-01-2019

Pin assignment for 600 MHz clock on Kintex Ultrascale

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Hi All,

I am working with Kintex KCU105 development board.

For a project we need to have 600 MHz clock input and also 600 MHz output both of them are LVDS.

I know that for the input clock we have some specific pins, so I connect it to FMC_LPC_DP0_M2C_P and pin Y2 on the FPGA  that is MGTHRXP0_226.

But for the output clock I dont know that I have to  assign a specific pairs of pin to it or and IO can be used.

Could anyone guide me in this issue?

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1 Solution

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Moderator
Moderator
257 Views
Registered: ‎08-08-2017

Re: Pin assignment for 600 MHz clock on Kintex Ultrascale

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Hi mostafa@sint 

GPIO can be used to forward the clock out from the FPGA.

Restriction only exist on clock inputs, Make sure that clock capable (DBC, QBC, GC) pins are used to bring the clock onto the device.

forwarding the clock 

Please refer to the elaborate answer by @avrumw in the similar post

https://forums.xilinx.com/t5/Other-FPGA-Architectures/Clock-capable-pin-pair-as-input-and-output/m-p/900031#M29716

Capture.JPG

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Reply if you have any queries, give kudos and accept as solution
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4 Replies
Moderator
Moderator
258 Views
Registered: ‎08-08-2017

Re: Pin assignment for 600 MHz clock on Kintex Ultrascale

Jump to solution

Hi mostafa@sint 

GPIO can be used to forward the clock out from the FPGA.

Restriction only exist on clock inputs, Make sure that clock capable (DBC, QBC, GC) pins are used to bring the clock onto the device.

forwarding the clock 

Please refer to the elaborate answer by @avrumw in the similar post

https://forums.xilinx.com/t5/Other-FPGA-Architectures/Clock-capable-pin-pair-as-input-and-output/m-p/900031#M29716

Capture.JPG

-------------------------------------------------------------------------------------------------------------------------------
Reply if you have any queries, give kudos and accept as solution
-------------------------------------------------------------------------------------------------------------------------------
Historian
Historian
242 Views
Registered: ‎01-23-2009

Re: Pin assignment for 600 MHz clock on Kintex Ultrascale

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I know that for the input clock we have some specific pins, so I connect it to FMC_LPC_DP0_M2C_P and pin Y2 on the FPGA that is MGTHRXP0_226.

Why did you choose this pair? Not only is this not a clock capable pair, it isn't even a "regular" I/O pair - it is the RX pair of one of the GTH channels. There is no way (at all) of using this as a clock.

If you want to use a signal as a general purpose clock, it needs to be on a GC pair (from the internal FPGA naming). If you are looking for one on the FMC card, use something like FMC_HPC_LA01_CC_P/N (the FMC name uses _CC_, which was the notation used in the 7 series) - pins G9 and F9.

Avrum

Observer mostafa@sint
Observer
204 Views
Registered: ‎01-01-2019

Re: Pin assignment for 600 MHz clock on Kintex Ultrascale

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Thanks for your note,

But GTH Rx has more frequency capabilities why we cant use it as a clock source?

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Historian
Historian
193 Views
Registered: ‎01-23-2009

Re: Pin assignment for 600 MHz clock on Kintex Ultrascale

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But GTH Rx has more frequency capabilities why we cant use it as a clock source?

You just can't. The RX input of the GTH is a dedicated pin that goes only to the GTH receiver, which does clock/data recovery on the signal using the infrastructure of the GTH (including the QPLL/CPLL and dedicated REFCLK of the GTH), ultimately generating a parallel (deserialized) output to the fabric. There is simply no way to route a signal from this pin into the fabric (at all) - forget about accessing the dedicated clocking resource in the FPGA.

Avrum

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