02-06-2018 02:47 AM
I'm working with Zedboard and I'm trying to enable the Indipendent JTAG for debbugging PS and PL separately.
So, I set the MIO2 jumper to 3.3V and set the boot from JTAG. Then, I loaded an .bit file that switches the EMIO PJTAG to connector JC1. Finally, I've tried to load an hello_word application using Xilinx Platform Cable connected to JC1 but the SDK report an error on JTAG connection.
Can anyone help me?
02-09-2018 01:12 AM
02-09-2018 01:24 AM
I've already read this document.
So, I've decided to start the same procedure using a Zynq Industrial on my custom board (therefore not CES device), but the problem is not solved.
Can you help me?
02-09-2018 01:38 AM
Did you check this topic:
It says that you need to source ps7_init.tcl before loading the bitstream to have the PS in a known state. Did you do it?
02-09-2018 02:32 AM - edited 02-09-2018 02:33 AM
the steps I've done are:
1) start-up the board with mio2 at high level (independent JTAG mode) end boot from JTAG
2) load a .bit file on PL JTAG that routes connection between PJTAG-EMIO on I/O pins
3) try to load an application in debug mode with SDK using PJTAG-EMIO connection, but without any success
The discussion you suggested me talks about "then program the muxing in FSBL and AFTER that you can use the PJTAG separatly", but the FSBL is referred of boot from FLASH and on UG585 I remember is wrote that the boot has to set from JTAG. Sorry, I don't understand.
Moreover, I'm trying to connect to PS through PJTAG on EMIO using tha Platform Cable USB II. It is correct?
Thanks a lot