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Visitor obie
Visitor
6,236 Views
Registered: ‎03-17-2012

Ram Installation

hi,

 

I use XUPV5-LX110T board and i've made some applications on ISE and also on board.

Now i need to use RAM block on the board ,i 've read some documents but i couldnt figure out how to do it.

I need to write datas on Ram and read them back.( on ISE) .Can you help me please?

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7 Replies
Xilinx Employee
Xilinx Employee
6,210 Views
Registered: ‎11-28-2007

Re: Ram Installation

Which RAM block on the board? the DDR2 SDRAM? or something else?

 


@obie wrote:

hi,

 

I use XUPV5-LX110T board and i've made some applications on ISE and also on board.

Now i need to use RAM block on the board ,i 've read some documents but i couldnt figure out how to do it.

I need to write datas on Ram and read them back.( on ISE) .Can you help me please?




Cheers,
Jim
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Visitor obie
Visitor
6,197 Views
Registered: ‎03-17-2012

Re: Ram Installation

Hi

Yes, it is DDR2 on the board.

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Xilinx Employee
Xilinx Employee
6,191 Views
Registered: ‎11-28-2007

Re: Ram Installation

Take a look at the MIG reference design from the XUPV5-LX110T page:

 

http://www.xilinx.com/univ/xupv5-lx110t-refdes.htm 

 


@obie wrote:

Hi

Yes, it is DDR2 on the board.




Cheers,
Jim
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Visitor obie
Visitor
6,188 Views
Registered: ‎03-17-2012

Re: Ram Installation

Well,it didn't help.

All i need is creating a project in ISE which can write and read from RAM when i simulate. (language:VHDL)

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Xilinx Employee
Xilinx Employee
6,177 Views
Registered: ‎11-28-2007

Re: Ram Installation

Did you download that MIG reference design and look what is inside???

 


@obie wrote:

Well,it didn't help.

All i need is creating a project in ISE which can write and read from RAM when i simulate. (language:VHDL)




Cheers,
Jim
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Visitor obie
Visitor
6,173 Views
Registered: ‎03-17-2012

Re: Ram Installation

yes i already done that.Language used in document is verilog but i only know VHDL.

I dont have FGPA board , i need to goto laboratory for it so i have to simulate it to see if it's working or not.

 

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Xilinx Employee
Xilinx Employee
6,159 Views
Registered: ‎11-28-2007

Re: Ram Installation

OK. In this case you can generate a MIG controller in VHDL yourself using Core Generator:

 

ScreenHunter_43.jpg

 


@obie wrote:

yes i already done that.Language used in document is verilog but i only know VHDL.

I dont have FGPA board , i need to goto laboratory for it so i have to simulate it to see if it's working or not.

 




Cheers,
Jim
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