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Registered: ‎02-20-2019

Reload PL Bitsream from PS on ZCU106 demo board

I would like to use the vcu_sdirxtx image from Targeted Reference Design of ZCU106 board and reprogram PL (after synthesis and implementation with Vivado)

If I use the image : vcu_sdirxtx folder (boot from SD card)
I can get SDI-RX input video and drive SDI-TX output (Display configuration file).

But I have to run the modetest command before :

modetest -M xlnx -s 37:1920x1080-60@YUYV -w 37:sdi_mode:2 -w 37:sdi_data_stream:2 -w 37:is_frac:0

Why do I have to use it ?
If not SDI-RX is working but SDI-TX not responding : AXI4S underflow


And if I try to use the bitstream generated by vivado to program PL nothing is working.

What I do :

-run  vcu_sdirxtx_proj.tcl in Vivado 2019.1
-run synthesis - implementation - generate Bitstream in Vivado 2019.1
-rename bitream from vcu_sdirxtx_top.bit to bistream.bit
-convert bitstream with bootgen from SDK2019.1 :
bootgen -image Bitstream.bif -arch zynqmp -o ./Bitstream.bin -w

-copy Bitstream.bin on usb key
-plug the usb key on ZCU106 and run the following commands :
echo 0 > /sys/class/fpga_manager/fpga0/flags
mkdir -p /lib/firmware
cp /media/usb/Bitstream.bin /lib/firmware/
echo Bitstream.bin > /sys/class/fpga_manager/fpga0/firmware

It seems to work but I can not use vcu_gst_app to run display configuration.
Do I have to configure or run something from PS ? 


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