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Registered: ‎03-03-2010

Spartan 601 development board full example project

I've recently been examining the 601 board schematics and other documentation and have been struggling to find a relatively complete firmware project for the board. The downloads section of the 601 board documentation does include project design files, however these projects do not cover the entire functionality of the FPGA. (found here: http://www.xilinx.com/support/documentation/sp601_13-4_rd.htm). I have only managed to find sample HDL code for the ethernet and MCB. I'm specifically interested in how other interfaces are used & constrained and the use of the user clock inside the firmware, however I can only find examples for the MCB and Ethernet interfaces. Are there any other projects available which demonstrate a more complete functionality of the board in an HDL? (or any additional functionality apart from that covered in the projects mentioned above?)
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Visitor imode69
Registered: ‎08-24-2011

Re: Spartan 601 development board full example project

The reference design that ships with the makes use of the ethernet port, however the window's component of the design (presumably the ethernet driver) only works on Windows XP 32 bit. 


If you are just starting out I would recommend either (depending on your HDL choice):


FPGA Prototyping By Verilog Examples: Xilinx Spartan-3 Version

FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version


both by Pong P. Chu.

They are for the earlier spartan-3 but the designs can be adapted to the SP601. Otherwise, you will find a dearth of step-by-step examples on Xilinx websites. I presume this is because the majority of the eval boards end up in university courses where the projects are allready mapped out. 


This next statement will probably start a religious war but if you have experience working with C++/C#/JAVA etc you might find VHDL more intuitive (especially if you already know ADA). However I made the mistake of thinking of them as traditional "programming" languages and ended up with lots of implied latches... 


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