cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
8,925 Views
Registered: ‎05-28-2013

UG669 Benchmark Demo Doesn't build for SP605 board

I am trying to build the CDMA Benchmark demo app described in UG669 for the SP605 demo board.
I have followed all the steps in UG669 to add the AXI_CDMA and PERF_AXI (UG669 pages 30-34), but when I try to generate the bitstream in ISE 13.2, I get 3 timing errors and the build fails. 

Has anyone successfully build this demo and ran it on an SP605 board?

Thanks.

0 Kudos
5 Replies
Highlighted
Scholar
Scholar
8,924 Views
Registered: ‎02-27-2008

Hmmmm,

 

I don't find ug669 anywhere.  Perhaps it was removed due to problems?  Contact who you bought your board from.

 

Austin Lesea
Principal Engineer
Xilinx San Jose
0 Kudos
Highlighted
Visitor
Visitor
8,469 Views
Registered: ‎10-21-2013

I have some trouble similar you have, I am working with that card, same demo (UG669 for SP605) but when  I try to synthesize I can't pass from this warning:

"EDK:4059 - INSTANCE: Soft_Ethernet_MAC, Overriding connection of PORT:

AXI_STR_RXS_ARESETN, VALUE: AXI_STR_RXS_ARESETN - which is part of the
connected BUSIF: S_AXI -
C:\SP605_Embedded_Kit\Benchmark_Demo\HW\MicroBlaze_ProcessorSubSy
stem\system.mhs line 592"

I have synthesized it a lot of times about 3 hours but the result is the same. Do you have an idea? Could you fix your trouble? Could you find a better tutorial?. My trouble is that I'm trying to learn AXI protocol but I can't find an efective tutorial about it.

Any help is welcome.

Thank you. 

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
8,368 Views
Registered: ‎08-02-2007

Hi,

 

Which version of tools are you using?

 

--HS

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
0 Kudos
Highlighted
Visitor
Visitor
8,353 Views
Registered: ‎10-21-2013

Hi

 

Well, I'm working with Xilinx ISE 14.4 but in fact I could fix the previous trouble, It just needed more time to synthesize but I had to wait for 5 hours long. But now I have a new trouble, I need a CDMA tutorial for SP605 demo card. I was looking for someone but all of them are made for Zynq card and steps are different, does anyone have more information about it?

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
8,293 Views
Registered: ‎08-01-2012

I think you are following http://www.xilinx.com/support/documentation/boards_and_kits/ug669_ml605_sp605_hw_tutorial_axi.pdf 

 

FYI: The BRD (Base reference designs) provided by Xilinx  is ISE tool version sensitive. That means the ISE tool version should match with BRD make version. For example if BRD made for ISE 13.X versions does not guaranteed for ISE 14.X tools.

________________________________________________

Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer.

Give kudos to this post in case if you think the information is useful and reply oriented.

0 Kudos