I have a VC707 board and i've been having problems getting my application to run in DDR3 memory. So, to test the DDR3 memory, I ran the DDR3 test in the BIST design residing in flash on the board. It passed the test multiple times.
I then tried the BIT file in the "ready_for_download" folder in "rdf0195-vc707-bist-c-2014-1.zip". It will either always pass the test or crash and become unresponsive at TEST0 of PASS A. If it fails, it requires a cycling of power to get things working again. Simply downloading the BIT file again will not get it to work.
I then tried the BIT file in the "ready_for_download" folder in "rdf0195-vc707-bist-c-2014-2.zip". This time, it does not crash, but fails periodically. Here is a typical failure:
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** VC707 - axi_7series_ddrx TEST **
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V7 axi_7series_ddrx Memory Test
Testing address range 0x80080000-0x80082000.
Iteration 1 of 1
Pass A) ICache: On, DCache: On
TEST0: Write all memory to 0x00000000 and check
Writing...
Reading...
Test Complete Status = SUCCESS
TEST1: Write all memory to 0xFFFFFFFF and check
Writing...
Reading...
Test Complete Status = SUCCESS
TEST2: Testing for stuck together bank/row/col bits
Clearing memory to zeros...
Writing and Reading...
Test Complete Status = SUCCESS
TEST3: Testing for maximum ba/row/col noise
This test performs 16 word writes followed by 16 word reads
Each 64 bytes inverts the ba/row/col address
Initializing Memory to 0xA5A5A5A5...
Writing and Reading...
Test Complete Status = SUCCESS
TEST4: Testing for Inverse Data at Address
Writing...
Reading...
Test Complete Status = SUCCESS
Number of errors in this pass = 0
Pass B) ICache: Off, DCache: Off
TEST0: Write all memory to 0x00000000 and check
Writing...
Reading...
Test Complete Status = SUCCESS
TEST1: Write all memory to 0xFFFFFFFF and check
Writing...
Reading...
Test Complete Status = SUCCESS
TEST2: Testing for stuck together bank/row/col bits
Clearing memory to zeros...
Writing and Reading...
Test Complete Status = SUCCESS
TEST3: Testing for maximum ba/row/col noise
This test performs 16 word writes followed by 16 word reads
Each 64 bytes inverts the ba/row/col address
Initializing Memory to 0xA5A5A5A5...
Writing and Reading...
TEST3.3 - ERROR #1: Address = 0x80081FC4, Data Expected was 0xFFFFFFFF, Data Received was 0xFFFF11FF
Test Complete Status = FAILURE
TEST4: Testing for Inverse Data at Address
Writing...
Reading...
Test Complete Status = FAILURE
Number of errors in this pass = 2
axi_7series_ddrx test iteration #1 has FAILED!
Total number of errors for all iterations = 2
### Program finished with errors ###
Press any key to return to main menu
Sometimes the DDR3 test will pass with no errors. When it fails it is always that same byte of data.
So, I have three versions of the BIST DDR3 test using Xilinx -supplied BIT files that produce three different results. One always works. I think I have a bad VC707 or something is marginal and causing two of the three BIST BIT files to fail the test.
Can someone out there with a VC707 run the BIST BIT file in the "ready_for_download" folder in "rdf0195-vc707-bist-c-2014-2.zip" archive and see if it passes the DDR3 test? I'm getting failures of the DDR3 test on maybe 7-8 runs out of 10 runs of the test. If it works for you then I'll submit an RMA to Xilinx.
Thanks,
Kevin
