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Registered: ‎07-31-2012

VC707 FMC incompatible with XM105 Debug Card?

I'm currently using a VC707 development card, and it appears to not be compatible with the XM105 FMC debug card. 


When I try to program the device using Impact with the FMC card attached, this is the error I see:


INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0xFFFFFFFF.
Data width read from the bitstream file = .
INFO:iMPACT:501 - '1': Added Device xc7vx485t successfully.
INFO:iMPACT - Current time: 7/31/2012 9:50:44 AM
// *** BATCH CMD : Program -p 1
PROGRESS_START - Starting Operation.
INFO:iMPACT:583 - '1': The idcode read from the device does not match the idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00001111111111111111111111111110
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000011011010000111000010010011
PROGRESS_END - End Operation.
Elapsed time =      0 sec.



Attempting to program with ChipScope gives a similiar error.  The same bitfile works fine without the XM105 FMC card attached.  I know it doesn't claim support for the VC707, but had assumed since it's a simple breakout card it should work.  Is there a version that does work with the VC707?




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Registered: ‎07-31-2012

Soon after posting, I ran into my local Xilinx FAE and he gave me some insight.  The JTAG chain is routed to the FMC (see page 22 of the VC707 user guide).  So if the debug card if attached then you need to jumper the TDI and TDO pins on connector J5 of the XM105.  It is now working for me.



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Registered: ‎01-30-2017

For others finding this, p. 26 in v.1.7.1 of  UG885 says:


When an FMC mezzanine card is attached to the VC707 board it is automatically added to
the JTAG chain through electronically controlled single-pole single-throw (SPST) switches
U27 and U28. The SPST switches are in a normally closed state and transition to an open
state when an FMC mezzanine card is attached. Switch U27 adds an attached FMC1 HPC
mezzanine card to the FPGAs JTAG chain as determined by the
FMC_HPC_PRSNT_M2C_B signal. Switch U28 adds an attached FMC2 HPC mezzanine
card to the FPGAs JTAG chain as determined by the FMC2_LPC_PRSNT_M2C_B signal.
The attached FMC card must implement a TDI-to-TDO connection via a device or bypass
jumper to ensure that the JTAG chain connects to the FPGA U1.

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