07-23-2014 01:27 PM
I have a VC707 Evaluation board which I have been programming using a Xilinx Platform Cable USB II. This has been working fine.
However, when I try and connect a FMC116 to either of the FMC sockets on the evaluation board I am unable to program the FPGA.
PROGRESS_START - Starting Operation.
INFO:iMPACT:583 - '1': The idcode read from the device does not match
the idcode in the bsdl File.
INFO:iMPACT:1578 - '1': Device IDCODE : 00000000000000000000000000000000
INFO:iMPACT:1579 - '1': Expected IDCODE: 00000011011010000111000010010011
And also shows "Program failed"
I think the problem should be referred to "The attached FMC card must implement a TDI-to-TDO connection via a device or bypass jumper to ensure that the JTAG chain connects to the FPGA U1." on the page 26 of "ug885_VC707_Eval_Bd".
07-23-2014 02:40 PM
It is not on the VC707, it needs to be on the FMC module. Contact the vendor of the FMC116.
11-24-2014 07:51 AM
You need to talk to the company that made the module. It is not compliant with the FMC specification.
12-22-2014 09:02 AM
It is allowed and compliant to the standard to use the JTAG chain. There is no requirement in the FMC standard that says the module should be able to support a JTAG bypass. Most of 4DSP modules however provide a build option to connect TDI and TDO which would be a proper work around for this issue. Please contact 4DSP technical support so we can help.
12-22-2014 12:13 PM
> There is no requirement in the FMC standard that says the module should be able to support a JTAG bypass.
This is incorrect.
Rule 5.62: The FMC module shall connect TDI to TDO, if the module does not use the JTAG interface.
If the FMC module does not implement the rule it is not compliant.
12-23-2014 12:41 PM
All 4DSP FMC products comply with this rule. If JTAG is not used, then TDI is connected to TDO. However if JTAG is used, then additional devices will show up in the chain. The issue seems to be with EDK no being able to support additional devices in the chain. Other tools, among which Impact, ChipScope and Vivado do not have this issue.
12-24-2014 03:01 PM
01-07-2015 04:11 AM
I changed the etc/download.cmd file to assign the bitfile in JTAG number 2 (assignfile -p 2 -file implementation/download.bit) and now i am able to download the bit file. I tried a Chipscope design also and i got the expected results in my registers...
It seems that this is the solution in an EDK design...