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elvisjohndowson
Explorer
Explorer
6,185 Views
Registered: ‎12-30-2008

VC709 with FMC-IMAGEON card

Hi,

     I'm trying to get the FMC-IMAGEON card working with the VC709. I've mapped all the FMC1_HPC pins to the FMC-IMAGEON card.

 

I'd like to know how to setup a path to the FMC1_HPC_IIC_SDA/SCL bus for the VC709 evaluation board, as stated in page 42 of the User Guide for the VC709 evaluation board UG887 1.0.

 

The VC709 BIST reference design used LVCMOS18 as the IOSTANDARD to communicate to the on-board EEPROM on the VC709 board.

 

The FMC-IMAGEON HDMI tutorials were for the ZC702, which used LVCMOS25 as the IOSTANDARD to communicate with the EEPROM on the FMC-IMAGEON card.

 

Q1. What IOSTANDARD should I set for the VC709, to communicate with the FMC-IMAGEON via the on-board I2C controller?

 

Q2. What should I do to setup the path to the FMC1_HPS_IIC_SDA/SCL I2C bus?

 

Elvis Dowson

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2 Replies
elvisjohndowson
Explorer
Explorer
6,183 Views
Registered: ‎12-30-2008

I used the LVCMOS25 IOSTANDARD, since that was what was used for the ZC702 tutorial, but it gives me the following error:

 

[Place 30-399] This design has IO with an IOSTANDARD of LVCMOS25 but the target device has no High Range (HR) banks that support this IO standard. Please review the 7 series FPGAs Packaging and Pinout guide for devices/packages that have High Range (HR) banks or change the IO standard for the following IO: 
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[15]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[14]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[13]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[12]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[11]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[10]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[9]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[8]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[7]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[6]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[5]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[4]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[3]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[2]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[1]
	fmc_imageon_hdmi_in_0_io_hdmii_video_pin[0]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[15]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[14]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[13]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[12]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[11]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[10]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[9]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[8]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[7]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[6]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[5]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[4]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[3]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[2]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[1]
	fmc_imageon_hdmi_out_0_io_hdmio_video_pin[0]
	fmc_imageon_hdmi_in_0_io_hdmii_spdif_pin
	fmc_imageon_hdmi_out_0_io_hdmio_spdif_pin
	fmc_imageon_hdmi_out_0_io_hdmio_clk_pin
	fmc_imageon_hdmi_in_0_clk_pin

 

In the FMC-IMAGEON hardware guide, it mentions that VADJ has to be set to 2.5V or 3.3V, so I guess setting the IOSTANDARD to LVCMOS25 is correct.

 

Can the VC709 FMC HPC port work with signals using the LVCMOS25 IOSTANDARD?

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amandaw
Xilinx Employee
Xilinx Employee
6,113 Views
Registered: ‎02-02-2010

Those signals are on a HP (High-performance) bank so actually they're at 1.8V

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