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Visitor gnaedig
Visitor
316 Views
Registered: ‎05-06-2019

VCU118 XDC pin mapping for JTAG

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Hello,

Im am using the VCU118 UltraScale+ development board.

In the documentation [ug1224 - Appendix B] it is written that a template XDC is provided on the VCU118 Evaluation Kit website.

I found one XDC file in vcu118-xdc-rdf0400.zip

However, for these files, the pin related to the JTAG interface are not declared but found in a section that is commented (see examples below):

#Other net PACKAGE_PIN AD15 - JTAG_TDI Bank 0 - TDI_0
#Other net PACKAGE_PIN AF15 - JTAG_TMS Bank 0 - TMS_0
#Other net PACKAGE_PIN AE13 - JTAG_TCK Bank 0 - TCK_0

I am wondering if it is normal that theses pins are not connected ? Shall I modify something in this file so that the JTAG can be used ?

Also in [ug1214 Chap3] for all components on the board, there is a table with the list of pins for the FPGA U1. This pin listing cannot be found for the Diligent USB JTAG module (page 40). I gues the reason is the same than why I cannot find it in the XDC file.

Are these pins implicit and they do not need to be declared in the XDC file ?

Thank in advance for any feedback.

 

 

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Scholar drjohnsmith
Scholar
309 Views
Registered: ‎07-09-2009

Re: VCU118 XDC pin mapping for JTAG

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You;ll find there are a few pins that the tools know about and are not user set, such as the JTAG and the mode pins.

My thought is that they are in the xdc file to help remind not to use these yourself as IO pins
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Scholar drjohnsmith
Scholar
310 Views
Registered: ‎07-09-2009

Re: VCU118 XDC pin mapping for JTAG

Jump to solution
You;ll find there are a few pins that the tools know about and are not user set, such as the JTAG and the mode pins.

My thought is that they are in the xdc file to help remind not to use these yourself as IO pins
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>