UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Newbie rafapeal
Newbie
296 Views
Registered: ‎04-16-2019

Virtex-6 FPGA ML605 Evaluation Kit GPIO

Jump to solution

Hello everyone,

 

We are using the Virtex-6 FPGA ML605 Evaluation Kit. We are using Xilinx ISE to generate code from Simulink blocks by using HDL Workflow Advisor.

 

We only need digital input outputs signals GPIO.

According to the documentation the user I/O pins are used for LEDS, pushbuttons, CPU reset, DIP switches, SMA GPIO and LCD display.

- Is there any expansion card to bypass these elements and have these IO pins available for other purposes?

 

In addition,

-  How can I get extra I/O pins?

- Which are the I/O pins in the FPGA board? Can I reconfigure pins used for peripherals as GPIOs?

 

Perhaps this is a very elementary question, thanks for your help,

 

Rafael

0 Kudos
1 Solution

Accepted Solutions
219 Views
Registered: ‎01-22-2015

Re: Virtex-6 FPGA ML605 Evaluation Kit GPIO

Jump to solution

Hi Rafael,

Welcome to the Xilinx Forum!

On the ML605 board, lots of digital IO is accessible via the FMC connectors (see chapters 19 and 20 in Xilinx document UG534).  You’ll find FMC cards and accessories at the following site.

https://www.xilinx.com/products/boards-and-kits/fmc-cards-and-accessories.html#other

Mark

View solution in original post

2 Replies
220 Views
Registered: ‎01-22-2015

Re: Virtex-6 FPGA ML605 Evaluation Kit GPIO

Jump to solution

Hi Rafael,

Welcome to the Xilinx Forum!

On the ML605 board, lots of digital IO is accessible via the FMC connectors (see chapters 19 and 20 in Xilinx document UG534).  You’ll find FMC cards and accessories at the following site.

https://www.xilinx.com/products/boards-and-kits/fmc-cards-and-accessories.html#other

Mark

View solution in original post

Newbie rafapeal
Newbie
101 Views
Registered: ‎04-16-2019

Re: Virtex-6 FPGA ML605 Evaluation Kit GPIO

Jump to solution

Hello Mark,

Thank you very much for your comment.

Finally, we were able to program the digital IOs accessible via the FMC (LPC) using Matlab/Simulink HDL encoder thanks to the Mathworks support. We could also configure the pull-up resistors by modifying the UCF file.

We are going to purchase a Breakout board for Low-Pin Count FPGA Mezzanine Card iamelectronic. It is just a passive board to ease the access to the pins, but this sufficient for our project.

Best regards,

Rafael

0 Kudos