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Registered: ‎03-01-2019

Xilinx ChipScope (ILA) bandwidth


I am working with the VC707 Evaluation kit (Virtex 7) and I need to know how many bits I can offload using ILA (Vivado 2019.1) in each second. I know that the JTAG clock frequency is 15 MHz and my ila is connected to a system clock of 150 MHz. The ila setting is the following:

  1. Capture mode: ALWAYS
  2. Number of Windows: 10
  3. Window data depth: 2

I need to be able to offload 12 values of 10 bit in about 40 us. Is it possible to meet these timing using ILA?

Many thanks in advance

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