cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
zhangyibing
Adventurer
Adventurer
2,380 Views
Registered: ‎12-23-2018

ZC106 XTP 492 ERROR

Jump to solution

hello:

       When I try to do the demo ZCU106 XTP492 step by step ,but I meet the question ,the VIVADO meet the error like that; 

[IP_Flow 19-3805] Failed to generate and synthesize debug IPs. error copying "c:/zcu106_ibert/ibert_bank_all/ibert_bank_all_ex/ibert_bank_all_ex.runs/impl_1/.Xil/Vivado-4800-HAPPY/dc_drv.0/dc/prj_ip.runs/dbg_hub_synth_1/dbg_hub.dcp": no such file or directory

I dont know why, I try to use the project that is provided by Xilinx .It runs OK.Here is my project and it seems too large to upload. Thank you!

0 Kudos
1 Solution

Accepted Solutions
zhangyibing
Adventurer
Adventurer
2,243 Views
Registered: ‎12-23-2018

My question has soluted in VIVADO 2018.2. And I think it is the problem of VIVADO 2018.3. Thank you for your answer!

View solution in original post

10 Replies
andresb
Xilinx Employee
Xilinx Employee
2,354 Views
Registered: ‎06-21-2018

Hi zhangyibing,

I believe the issue might be originated by your use of the dash '-' 

Take a look at Apendix B of UG895 for restrictions on Vivado Naming Conventions:
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_3/ug895-vivado-system-level-design-entry.pdf

Thanks,
Andres

0 Kudos
zhangyibing
Adventurer
Adventurer
2,348 Views
Registered: ‎12-23-2018

Hello 

0 Kudos
nmanitri
Xilinx Employee
Xilinx Employee
2,329 Views
Registered: ‎06-13-2018

Hello @zhangyibing,

Please confirm, did you try to run this example design on Linux machine? 

This issue occurs on a Windows machine, the root cause is often a failed generation of the Debug Hub due to a path length issue.

Windows only support 260 characters in a path.

The Debug Hub is generated in a temporary folder and can violate this path length limitation.

The recommendation is to reduce path length and regenerate the Debug Hub.

Regards,

Naveen

0 Kudos
zhangyibing
Adventurer
Adventurer
2,321 Views
Registered: ‎12-23-2018

Hello , Thank you for your answer!

In the path of "c:/zcu106_ibert/ibert_bank_all/ibert_bank_all_ex/ibert_bank_all_ex.runs/impl_1/.Xil/Vivado-4800-HAPPY/dc_drv.0/dc/prj_ip.runs/dbg_hub_synth_1/dbg_hub.dcp".

I can only decide c:/zcu106_ibert/ibert_bank_all, the other is generated by Vivado.

I also try to do it. I decide the c:/z106/ and it also has the problem. Seems like that:
[IP_Flow 19-3805] Failed to generate and synthesize debug IPs.
error copying "c:/z106/ibert_ultrascale_ex/ibert_ultrascale_ex.runs/impl_1/.Xil/Vivado-12592-HAPPY/dc_drv.0/dc/prj_ip.runs/dbg_hub_synth_1/dbg_hub.dcp": no such file or directory.

And can I have the other solution except change the windows to Linux?

0 Kudos
nmanitri
Xilinx Employee
Xilinx Employee
2,311 Views
Registered: ‎06-13-2018

Hello @zhangyibing 

Can you please follow the below workaround to change the directory.

1. Right, Click on Vivado Shortcut.

2. Goto the property option select 'Shortcut'.

3. In Shortcut you will find "Start in" parameter ==> change the path.

Capture1.PNG

If above workaround does not work for you, then please change the name of your computer if it is an ASCII character. The computer name cannot be done using ASCII characters. Vivado normally creates a subfolder in the.Xil folder that contains the name of the current/working computer.

Hope this will work for you.

FYI: I am using Windows 10 and I am able to generate the bit file following the same flow.

Regards,

Naveen

0 Kudos
zhangyibing
Adventurer
Adventurer
2,303 Views
Registered: ‎12-23-2018

Hello

 I have change the path like the picture。And I want to Know the meaning of Start in Path; I means what?

 And My computer name is HAPPY.

The error still happen:

[IP_Flow 19-3805] Failed to generate and synthesize debug IPs.
error copying "c:/zcu106_ibert/ibert_bank_all/ibert_bank_all_ex/ibert_bank_all_ex.runs/impl_1/.Xil/Vivado-5500-HAPPY/dc_drv.0/dc/prj_ip.runs/dbg_hub_synth_1/dbg_hub.dcp": no such file or directory

Before.png
After.png
0 Kudos
andresb
Xilinx Employee
Xilinx Employee
2,271 Views
Registered: ‎06-21-2018

Hi zhangyibing,

I followed the Tutorial and it finished successfully. 

Which version of Vivado are you using?

Does it fail when you try to Generate the IBERT design and synthesize (slides 39 and 40)?

Thanks,
Andres

 

0 Kudos
zhangyibing
Adventurer
Adventurer
2,264 Views
Registered: ‎12-23-2018

My pc OS is WIN 10 and VIVADO is  2018.3.

I failed in Implemention. And the text is the log.

What is slides 39 and 40?

0 Kudos
zhangyibing
Adventurer
Adventurer
2,244 Views
Registered: ‎12-23-2018

My question has soluted in VIVADO 2018.2. And I think it is the problem of VIVADO 2018.3. Thank you for your answer!

View solution in original post

andresb
Xilinx Employee
Xilinx Employee
2,210 Views
Registered: ‎06-21-2018

Hi zhangyibing,

Great to hear you're up and running! Mark an answer as the Accepted Solution so it can benefit other users.

Thanks,
Andres

0 Kudos