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GB
Visitor
Visitor
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Registered: ‎02-12-2021

ZCU102 Power ON/OFF sequence

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Good day

I plan to use a zynq Ultrascale MPSoC in a new design and i try to understand the power sequence ON and OFF requirements.

DS925 recommends powering the SoC with a specific sequence and reverse power off sequence.

My question concerns the power off sequence of the ZCU102: 

  • Does the power-off recommendation is satisfed if the power cable (J52) is disconnected during power ON ?
    • This result REG_EN signal low. This signal is used by all regulators to turn ON/OFF.  As the global power is OFF (J52 disconnected) do all regulators switch-off at the same time?

 

Does the power-off recommendation is mandatory for zynq ultrascale architecture ?

Thank you for responses

 

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ddn
Moderator
Moderator
164 Views
Registered: ‎06-06-2018

@GB ,

Does the power-off recommendation is satisfed if the power cable (J52) is disconnected during power ON ?

>> No.

  • This result REG_EN signal low. This signal is used by all regulators to turn ON/OFF.  As the global power is OFF (J52 disconnected) do all regulators switch-off at the same time?

>> Yes.

Does the power-off recommendation is mandatory for zynq ultrascale architecture ?

>> No. Its not mandatory. But all voltages should be under recommended Voltage levels as per device data sheet.

Regards,
Deepak D N
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1 Reply
ddn
Moderator
Moderator
165 Views
Registered: ‎06-06-2018

@GB ,

Does the power-off recommendation is satisfed if the power cable (J52) is disconnected during power ON ?

>> No.

  • This result REG_EN signal low. This signal is used by all regulators to turn ON/OFF.  As the global power is OFF (J52 disconnected) do all regulators switch-off at the same time?

>> Yes.

Does the power-off recommendation is mandatory for zynq ultrascale architecture ?

>> No. Its not mandatory. But all voltages should be under recommended Voltage levels as per device data sheet.

Regards,
Deepak D N
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Please Kudo and Accept as a Solution, If it helps.
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View solution in original post