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h_corey
Contributor
Contributor
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Registered: ‎12-24-2009

ZCU102 fail to boot from SD card

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Tried all weekend to get my ES2 ZCU102 board to boot from SD card.  Everything else I have checked works just fine.

The BIT works.

JTAG boot works

Mounting and reading and writing to the SDcard works after booting from the JTAG.  Even reading and booting linux from an image on the SDcard works.

Multiple high quality SDcards of various sizes were tried.

Followed the detailed formatting of an SD card outlined for the 702 board did not help. http://www.wiki.xilinx.com/Zc702+Linux

 

How I fail:

Insert an SDcard with boot.bin and image.ub files from the prebuilt BSP (via section 3 of https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_3/ug1156-petalinux-tools-workflow-tutorial.pdf)

Make sure that the boot SW6 is correctly configured to 0101

Apply power via SW1 (or click the POR_B switch)

The red Reset light is momentary on, followed by the red ps_error_out light that stays on.  The init_b light is always red.  All other leds on the board appear to behave correctly

 

I get no output from the STDOUT UART so I am assuming that the Zynq chip is not seeing the SD card.

 

Ideas?

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h_corey
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Registered: ‎12-24-2009

Turns out that on ES2 silicon with the REV 1 board the boot mode needs to be set to "E".  After that change and a rebuild of the BSP from scratch my board boots but still has a ps_error led lit.

View solution in original post

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17 Replies
vuppala
Xilinx Employee
Xilinx Employee
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Registered: ‎04-16-2012

Hi @h_corey

 

Did you check this answer record: https://www.xilinx.com/support/answers/67775.html

 

Thanks,

Vinay

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h_corey
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Registered: ‎12-24-2009

So I read that answer record and assumed that since I was using 2016.3 BSP it was fixed.

 

Let me give it a whirl.

 

 

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stephenm
Moderator
Moderator
17,969 Views
Registered: ‎09-12-2007

could be an issue with the boot mode, can you read this:

connect
targets -set -filter {name =~ "PSU"}
puts [mrd 0xFF5E0200]

 

this should be 5 (0101) for SD Card. 

 

The dip switch SW6 is upside down which often causes confusion

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h_corey
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Registered: ‎12-24-2009

I tried both configurations.  no change. no boot.

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h_corey
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17,949 Views
Registered: ‎12-24-2009

I am not familiar with the commands connect and targets.  Are they executed in u-boot?

 

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tkammacher
Visitor
Visitor
17,923 Views
Registered: ‎12-09-2016

I am having the same issue with a ZCU102 ES2 (Revision 1.0), trying to boot Linux from SD card.

Booting from JTAG works (although after that I still can not access the SD card). But I can not boot from SD card. None of the prebuilt images work.

 

The LEDs behave as described by h_corey:

The red Reset light is momentary on, followed by the red ps_error_out light that stays on.  The init_b light is always red. 

I have tried with the SD HC I (10) card that was included in the kit as well as with a SD HC (4) card. If no SD card is inserted the LEDs appear to behave exactly the same.

 

XSDB shows that SW6 is indeed set to 0x5:

xsdb% targets -set -filter {name =~ "PSU"}                                                                                                                                            
xsdb% puts [mrd 0xFF5E0200]                                                                                                                                                           
FF5E0200:   00000005
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h_corey
Contributor
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Registered: ‎12-24-2009

targets -set -filter {name =~ "PSU"}
xsct% puts [mrd 0xFF5E0200]
FF5E0200: 00000005

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tkammacher
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17,900 Views
Registered: ‎12-09-2016

Using the prebuilt image from petalinux that can be generated from the BSP (Xilinx-ZCU102-v2016.3-final.bsp), I can at least get some output from the UART console. I have copied pre-built/linux/images/BOOT.BIN to the SD Card and set SW6 to 0xE. Then the following output is shown on the UART. The LEDs behave the same as previously.

Xilinx Zynq MP First Stage Boot Loader 
Release 2016.3   Oct 16 2016  -  20:13:59
Platform: Silicon (3.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
Board Configuration successful 
Processor Initialization Done 
================= In Stage 2 ============ 
SD1 with level shifter Boot Mode 
SD: rc= 0
File name is BOOT.BIN
SD: Unable to open file BOOT.BIN: 3
                                   XFSBL_ERROR_SD_F_OPEN
Boot Device Initialization failed 0x29

When SW6 is to either 0x5 or 0x3, there is no output at all.

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glena
Moderator
Moderator
17,883 Views
Registered: ‎03-19-2014

The PCB board files are different on the released 1.0 board from the pre-release boards.   Please use the files from the released site https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-es2-g.html#docs   Hopefully that will help you out

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h_corey
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Registered: ‎12-24-2009

Turns out that on ES2 silicon with the REV 1 board the boot mode needs to be set to "E".  After that change and a rebuild of the BSP from scratch my board boots but still has a ps_error led lit.

View solution in original post

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stephenm
Moderator
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13,436 Views
Registered: ‎09-12-2007

The prebuild HW Platform in the SDK for the ZCU102 isnt for the rev1 board. Is this the case for you?

If so, you can create the HW in Vivado for the rev1 and export to SDK, and use this HDFfile

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sury_geng
Visitor
Visitor
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Registered: ‎02-06-2017

Hi tkammacher, I came into the same the problem, "XFSBL_ERROR_SD_F_OPEN".

 

How do you solved this? 

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tkammacher
Visitor
Visitor
13,348 Views
Registered: ‎12-09-2016

Hi

 

I am using the ES2 version (Rev 1.0) of the ZCU102. I originally tested some prebuilt Linux Images for the ES1 which did not work. Then I found XTP428 on [1].

 

From the ZIP design file for XTP428 "rdf0377.." [2] I took the boot.bin and image.ub and put them on a sd card.

Also important is to set SW6 to 0xE and to choose the correct serial port (for me it was the 3rd out of the 4 created by the driver).

 

[1]

https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-es2-g.html#docs

[2]

https://secure.xilinx.com/webreg/clickthrough.do?cid=475216&license=RefDesLicense&filename=rdf0377-zcu102-bit-es2-2016-4.zip&languageID=1

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tgolubev_mentor
Observer
Observer
13,180 Views
Registered: ‎02-14-2017

The problem is that the zcu102-base-trd-2016-3.zip  provided by Xilinx, targets the ES1 silicon.

 

To fix this, overwrite the zcu102-base-trd-2016-3 hdf file, with an ES2 version, and you can use the complete petalinux flow, and have a working FSBL & BOOT.BIN for ES2!

 

 

Problem:

the archive contains the HDF file, and if you unzip it (rename .hdf to .zip, and unzip)

 

[tgolubev@localhost tmp]$ cat hwdef.xml
...
<TOOL_VERSION Version="2016.3_sdx"/>
<MODE Name="Pre-Synthesis"/>
<SYSTEMINFO BOARD="" PART="xczu9eg-ffvb1156-2L-e-es1" ARCH="zynquplus" PACKAGE="ffvb1156" DEVICE="xczu9eg" SPEED="-2L"/>
...


Fix:

 

Either Generate new ES2 Vivado Design, or find an HDF file on the net, and overwrite the one petalinux uses.

 

To generate an ES2 design in Vivado

 

Step 1) Lauch Vivado for TRD

In Shell:

$cd pl/zcu102_base_trd

$vivado &

 

Step 2) Create Design

In Vivado:

** You will need to have a valid TPG License for this step to complete **

set argv [ list -silicon es2 ]

set argc 2

source scripts/create_project.tcl

 

(This will generate the zcu102 Base TRD design, targeting ES2 silicon)

 

Step 3) Export Hardware, including Bitstream.

 


 

Now we take the exported hdf file from VIvado (This is a complete archive including the system definition psu_init.c, psu_init.h, and optionally the bit file)

 

Overwrite the original TRD HDF file, with your fresh ES2 version:

 

[tgolubev@localhost zcu102-base-trd-2016-3]$ cp ~/zynq/sdk_test/zcu102_base_trd_wrapper.hdf apu/petalinux_bsp/hw-description/zcu102_base_trd_wrapper.hdf

 

Now use normal petalinux flow.

 

Cheers,

--Tom

 

Please mark this as a solution, as "getting a copy of a prebuilt ES2 FSBL" is not a solution.

 

 

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raphael.ponsard
Adventurer
Adventurer
13,023 Views
Registered: ‎09-05-2007

Dear all,

 

I can confirm you have to set SW6 to 0xE for SD boot (some level shifter related configuration). HW : fpga is ES2 / PCB revision1.0

I boot OpenEmbedded linux-xlnx.

 

But there in an annoying delay in fsbl (several seconds, before bit file flashing...) Do you experienced this issue in fsbl ?

 

 

Release 2016.4 Feb 20 2017 - 08:52:33
Platform: Silicon (3.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
Board Configuration successful
Processor Initialization Done
================= In Stage 2 ============
SD1 with level shifter Boot Mode
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0
Image Header Table Offset 0x8C0
*****Image Header Table Details********
Boot Gen Ver: 0x1020000
No of Partitions: 0x5
Partition Header Address: 0x280
Partition Present Device: 0x0
Initialization Success
======= In Stage 3, Partition No:1 =======
UnEncrypted data Length: 0x65216F
Data word offset: 0x65216F
Total Data word length: 0x65216F
Destination Load Address: 0xFFFFFFFF
Execution Address: 0x0
Data word offset: 0x9300
Partition Attributes: 0x120

 

TIMEOUT HERE

then resume correctly...

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lcameron
Adventurer
Adventurer
11,436 Views
Registered: ‎02-14-2014

 


@raphael.ponsard wrote:

 But there in an annoying delay in fsbl (several seconds, before bit file flashing...) Do you experienced this issue in fsbl ?

 



Yes, I get a few seconds delay.  Between the bootloader's first two lines and the FPGA done light.

 

I'm running on ES2, not quite the instructions above. An Ubuntu root fs I downloaded with ES2 versions of a BOOT.BIN, bitstream and dtb copied in to the boot partition.

 

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sewal1
Observer
Observer
4,351 Views
Registered: ‎05-09-2019

YES !!! The SW6 is connected or marked WRONG.  The settings in the manual as mis-leading.

Here is how I booted from the SD-CARD, on the ZCU102 Board.

SW6: Looking at the board with the JTAG socket, Eth Cable, on the bottom, and the power supply on the top left.

                      D U U U

                       1  2  3  4

D= down, U=up

All green LEDs, and DONE LED lights up.  No RED leds on.

All works great.