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Observer
Observer
6,850 Views
Registered: ‎08-16-2007

ddr2 memory controller validattion on ML555 Board

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Hi,

We have purchased ML555 Board from xilnx.

we want to validate ddr2 controller on that board.

we have loaded the bit map file of ddr2 controller provided in the CD.

we have not observed any toggling on leds provided for data valid for compare logic mentioned in the read me file.

clocks are generated properly as mentioned in the userguide. Let us know the reason for this behavior.

regards

--sampath

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Observer
Observer
7,677 Views
Registered: ‎08-16-2007
Hi ,

We are trying validate ddr2 memory controller on ML555 Board.

Before loading build into we have followed following steps

1. Power on through pci express slot
2. SW10 and SW12 dip switch settings are done as per M[8:0] and N[1:0] values ( For 200 MHz)
3. After the above step no : 2 we have pressed the SW9 switch.

After following above steps we have downloaded the ddr2 memory controller build onto ML555 board which is provided in the CD.

We didn't observe the following behaviour as you mentioned in the mail.
The test is good if LED(left) is off, LED(middle) is on and LED(right) is dim.

We have probed all clock signals and clocks are fine at all places in the board. (200MHz clock).

In simulations also ddr2 controller files provided in the CD are not working properly.

I need files working in simulation environment.

If you any ddr2 controller files and bit map which you have tested on ML555 FPGA board please send us.

regards
--sampath

View solution in original post

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Observer
Observer
7,678 Views
Registered: ‎08-16-2007
Hi ,

We are trying validate ddr2 memory controller on ML555 Board.

Before loading build into we have followed following steps

1. Power on through pci express slot
2. SW10 and SW12 dip switch settings are done as per M[8:0] and N[1:0] values ( For 200 MHz)
3. After the above step no : 2 we have pressed the SW9 switch.

After following above steps we have downloaded the ddr2 memory controller build onto ML555 board which is provided in the CD.

We didn't observe the following behaviour as you mentioned in the mail.
The test is good if LED(left) is off, LED(middle) is on and LED(right) is dim.

We have probed all clock signals and clocks are fine at all places in the board. (200MHz clock).

In simulations also ddr2 controller files provided in the CD are not working properly.

I need files working in simulation environment.

If you any ddr2 controller files and bit map which you have tested on ML555 FPGA board please send us.

regards
--sampath

View solution in original post

0 Kudos
Highlighted
Observer
Observer
6,751 Views
Registered: ‎08-16-2007
Hi ,

We are trying validate ddr2 memory controller on ML555 Board.

Before loading build into we have followed following steps

1. Power on through pci express slot
2. SW10 and SW12 dip switch settings are done as per M[8:0] and N[1:0] values ( For 200 MHz)
3. After the above step no : 2 we have pressed the SW9 switch.

After following above steps we have downloaded the ddr2 memory controller build onto ML555 board which is provided in the CD.

We didn't observe the following behaviour as you mentioned in the mail.
The test is good if LED(left) is off, LED(middle) is on and LED(right) is dim.

We have probed all clock signals and clocks are fine at all places in the board. (200MHz clock).

In simulations also ddr2 controller files provided in the CD are not working properly.

I need files working in simulation environment.

If you any ddr2 controller files and bit map which you have tested on ML555 FPGA board please send us.

regards
--sampath
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Highlighted
Visitor
Visitor
3,708 Views
Registered: ‎10-12-2009
HI, can you tell me what are the OS that the ml555 works on and what are its version.thxs a lot
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