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742 Views
Registered: ‎03-03-2016

make error Vivado 2016.4 on Centos 7.3

Hi sorry if this is the wrong message area. Moderator, please move it if you need to.

 

I'm working with a 3rd party and trying to mirror what they are doing for us on my own system.  They are successful in the following steps, but they are using a different Linux (Ubuntu 14.04 LTS).  I already had a Centos VM installed for the Petalinux work on this project so I decided to try the Vivado project here as well.  All of the Vivado install, licensing, devkit project git, checkout, etc. seem to go ok.  Most of the make goes ok, but it fails at the end and I can't seem to determine what the problem is.

 

I have a ZC706 and I have installed Vivado 2016.4 on Centos 7.3 VM

 

I am trying to make the dev kit bitstream.  The project I am trying to build is located here:

 

git://github.com/analogdevicesinc/hdl.git

 

I'm using the hdl_2017_r1 release because GitHub says that release is compatible with 2016.4.

 

git checkout hdl_2017_r1

 

of course there is the "source"

 

source /opt/Xilinx/Vivado/2016.4/settings64.sh

 

then the make

 

make fmcomms2.zc706

 

the make dumps the following on the screen.  I have also attached the fmcomms2_zc706_vivado.log file.

 

[sbates@localhost hdl]$ make fmcomms2.zc706
cd projects/fmcomms2/zc706; make
make[1]: Entering directory `/home/sbates/work/hdl/projects/fmcomms2/zc706'
make -C ../../../library/axi_ad9361
make[2]: Entering directory `/home/sbates/work/hdl/library/axi_ad9361'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_ad9361_ip.tcl >> axi_ad9361_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/axi_ad9361'
make -C ../../../library/axi_clkgen
make[2]: Entering directory `/home/sbates/work/hdl/library/axi_clkgen'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/axi_clkgen'
make -C ../../../library/axi_dmac
make[2]: Entering directory `/home/sbates/work/hdl/library/axi_dmac'
make -C ../util_axis_fifo/
make[3]: Entering directory `/home/sbates/work/hdl/library/util_axis_fifo'
make -C ../util_cdc/
make[4]: Entering directory `/home/sbates/work/hdl/library/util_cdc'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_cdc_ip.tcl >> util_cdc_ip.log 2>&1
make[4]: Leaving directory `/home/sbates/work/hdl/library/util_cdc'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_axis_fifo_ip.tcl >> util_axis_fifo_ip.log 2>&1
make[3]: Leaving directory `/home/sbates/work/hdl/library/util_axis_fifo'
make -C ../util_axis_resize/
make[3]: Entering directory `/home/sbates/work/hdl/library/util_axis_resize'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_axis_resize_ip.tcl >> util_axis_resize_ip.log 2>&1
make[3]: Leaving directory `/home/sbates/work/hdl/library/util_axis_resize'
make -C ../util_cdc/
make[3]: Entering directory `/home/sbates/work/hdl/library/util_cdc'
make[3]: Nothing to be done for `all'.
make[3]: Leaving directory `/home/sbates/work/hdl/library/util_cdc'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_dmac_ip.tcl >> axi_dmac_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/axi_dmac'
make -C ../../../library/axi_hdmi_tx
make[2]: Entering directory `/home/sbates/work/hdl/library/axi_hdmi_tx'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_hdmi_tx_ip.tcl >> axi_hdmi_tx_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/axi_hdmi_tx'
make -C ../../../library/axi_spdif_tx
make[2]: Entering directory `/home/sbates/work/hdl/library/axi_spdif_tx'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_spdif_tx_ip.tcl >> axi_spdif_tx_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/axi_spdif_tx'
make -C ../../../library/util_clkdiv
make[2]: Entering directory `/home/sbates/work/hdl/library/util_clkdiv'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_clkdiv_ip.tcl >> util_clkdiv_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/util_clkdiv'
make -C ../../../library/util_cpack
make[2]: Entering directory `/home/sbates/work/hdl/library/util_cpack'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_cpack_ip.tcl >> util_cpack_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/util_cpack'
make -C ../../../library/util_rfifo
make[2]: Entering directory `/home/sbates/work/hdl/library/util_rfifo'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_rfifo_ip.tcl >> util_rfifo_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/util_rfifo'
make -C ../../../library/util_tdd_sync
make[2]: Entering directory `/home/sbates/work/hdl/library/util_tdd_sync'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_tdd_sync_ip.tcl >> util_tdd_sync_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/util_tdd_sync'
make -C ../../../library/util_upack
make[2]: Entering directory `/home/sbates/work/hdl/library/util_upack'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_upack_ip.tcl >> util_upack_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/util_upack'
make -C ../../../library/util_wfifo
make[2]: Entering directory `/home/sbates/work/hdl/library/util_wfifo'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source util_wfifo_ip.tcl >> util_wfifo_ip.log 2>&1
make[2]: Leaving directory `/home/sbates/work/hdl/library/util_wfifo'
rm -rf *.cache *.data *.xpr *.log *.jou xgui *.runs *.srcs *.sdk *.hw *.sim .Xil *.ip_user_files
vivado -mode batch -source system_project.tcl >> fmcomms2_zc706_vivado.log 2>&1
make[1]: *** [fmcomms2_zc706.sdk/system_top.hdf] Error 1
make[1]: Leaving directory `/home/sbates/work/hdl/projects/fmcomms2/zc706'
make: *** [fmcomms2.zc706] Error 2

 

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1 Reply
Mentor jmcclusk
Mentor
730 Views
Registered: ‎02-24-2014

Re: make error Vivado 2016.4 on Centos 7.3

I recently compiled this code successfully with Kubuntu 14.04 LTS, so I'm puzzled by the error message at the end of the log file:

 

---------------------------------------------------------------------------------
Finished Part Resource Summary
---------------------------------------------------------------------------------
INFO: [Synth 8-5580] Multithreading enabled for synth_design using a maximum of 4 processes.
/opt/Xilinx/Vivado/2016.4/bin/loader: line 179: 9848 Killed "$RDI_PROG" "$@"
Parent process (pid 9848) has died. This helper process will now exit
[Tue Jan 23 14:40:20 2018] synth_1 finished
wait_on_run: Time (s): cpu = 00:00:00.84 ; elapsed = 00:08:38 . Memory (MB): peak = 1662.457 ; gain = 0.000 ; free physical = 76 ; free virtual = 656
ERROR: [Common 17-69] Command failed: Run 'synth_1' failed. Unable to open
INFO: [Common 17-206] Exiting Vivado at Tue Jan 23 14:40:23 2018...

 

I had found that Vivado versions more recent than 2016.4 won't compile the 2017_r1 release, but if you check out the "master" branch, the code does compile with 2017.3 or 2017.4.     My conclusion here is that there's something about CentOS 7.3 that's causing this crash.   The exact cause is unclear, however.

Don't forget to close a thread when possible by accepting a post as a solution.
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