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Newbie rpodgorny
Newbie
7,530 Views
Registered: ‎04-13-2011

no clock-capable pins on fmc hb?

hello,

 

any time i try to use clock-capable pins (according to master ucf file) on fmc's hb port, i get the typical non-optimal error i get when using any other pin. everything works fine for la port. i'm prerry sure the mapping is correct in my ucf file. are pins 0, 6 and 17 on hb really clock-capable?

 

thanks!

 

 

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9 Replies
Xilinx Employee
Xilinx Employee
7,525 Views
Registered: ‎01-03-2008

Re: no clock-capable pins on fmc hb?

There isn't enough information in your post.  FMC is an industry standard (VITA 57.1), but each board that implements it will be different.

 

You need to specify what board you are using in order for anyone to help.

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Newbie rpodgorny
Newbie
7,511 Views
Registered: ‎04-13-2011

Re: no clock-capable pins on fmc hb?

oh, i'm sorry, i've read so many forum posts about ml605 i forgot to mention it.

 

so, the board is ml605 (with virtex6). the pins i'm interested in are:

 

fmc hpc hb 00 cc p -> loc=af30

fmc hpc hb 06 cc p -> loc=af26

(...and others signed as cc)

 

pins which work as clock (without any warning) are:

 

fmc hpc la 00 cc p -> loc=af20

(...and others on la signed as cc)

 

thank you.

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Xilinx Employee
Xilinx Employee
7,498 Views
Registered: ‎01-03-2008

Re: no clock-capable pins on fmc hb?

On the ML605 the 3 CC pins in the FMC HPC HB bus are connected to Clock Capable pins

 

FMC_HPC_HB_00_CC_P|N - AF30, AG30 - MRCC Bank 12

FMC_HPC_HB_06_CC_P|N - AF26, AE26 - SRCC Bank 12

FMC_HPC_HB_17_CC_P|M - AG27, AG28 - MRCC Bank 12

 

Bank 12 is on outer IO column of the 6VLX240T device (see Figure 1-3 in UG365) and MRCC and SRCC pins in the outer IO columns cannot connect directly to a MMCM or BUFG (see Table 1-6 in UG365).  They can drive BUFIO and BUFR for clocking within these regions.

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Visitor hdabag
Visitor
7,343 Views
Registered: ‎08-25-2011

Re: no clock-capable pins on fmc hb?

Hello there,

 

i'm trying to generate and LVDS output clock signal on pins: 

FMC_HPC_HB_00_CC_P|N - AF30, AG30 - MRCC Bank 12

 

but i do not get any signal out.

in my code i have a clk_out signal which is succesfully driving the board LEDs and then I used

 

my_obuf : obufds_lvds_25

port map (
i => clk_out,
o => dci_p,
ob => dci_n);

 

The ucf file has this lines:

NET "dci_p" LOC = AF30;
NET "dci_n" LOC = AG30;

 

Do you know what am I doing wrong?

thanks

 

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Visitor hdabag
Visitor
7,342 Views
Registered: ‎08-25-2011

Re: no clock-capable pins on fmc hb?

i'm using the ML605 board
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Xilinx Employee
Xilinx Employee
7,335 Views
Registered: ‎01-03-2008

Re: no clock-capable pins on fmc hb?

The most likely cause is that one of these.

 

1) The bitstream that you downloaded didn't have the LVDS output buffer (wrong file or it failed somewhere along the way)

2) The LOC constraints that you think you applied were not applied (check the Pinout report file)

3) You are probing on the wrong pins on the FMC board

 

 

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Visitor hdabag
Visitor
7,325 Views
Registered: ‎08-25-2011

Re: no clock-capable pins on fmc hb?

i wish it was one of those three problems but unfortunately is not.

 

1) The bitstream that you downloaded didn't have the LVDS output buffer (wrong file or it failed somewhere along the way)

 

i'm using the correct Bit file and there is no error.

 

2) The LOC constraints that you think you applied were not applied (check the Pinout report file)

the report file shows the correct LVDS25 pinout for my dci_p and dci_n 

 

3) You are probing on the wrong pins on the FMC board

i probed all the pins just in case, but no luck.

 

if i send the same clock signal to the LPC connector it works, i can see the clk signal. but if i send it to the HPC pins i do not see anything.

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Xilinx Employee
Xilinx Employee
7,322 Views
Registered: ‎01-03-2008

Re: no clock-capable pins on fmc hb?

Ok, after a quick look at the schematics the problem is that you do not have a FMC module plugged in to the ML605.

 

The FMC specification has the HB pins powered from the FMC module. The ML605 has the HB bus assign to Bank 12 and the VCCO is sourced from the VIO_B_M2C pins on the FMC HPC interface.  Without a module on the HPC that  either provides power to these pins (sometimes with just a direct connection from the VADJ) the IOs cannot operate.

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Visitor hdabag
Visitor
7,312 Views
Registered: ‎08-25-2011

Re: no clock-capable pins on fmc hb?

thank you that was exactly it. 

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