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Adventurer
Adventurer
6,286 Views
Registered: ‎10-26-2010

pixel rate and Xclk of DVI controller

dear all

 

i ask about when i choose this resloution for display 640*480 so the xclk will be 25MHz 

if i choose the clock to wrok at 2x pixel rate is the clock still at 25MHz or what 

 

 

wait your reply 

regards 

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Instructor
Instructor
6,282 Views
Registered: ‎07-21-2009

i ask about when i choose this resloution for display 640*480 so the xclk will be 25MHz 

if i choose the clock to wrok at 2x pixel rate is the clock still at 25MHz or what

 

What is the pixel rate for display 640*480?  If the pixel rate is 25MHz, then 2x pixel rate is 50MHz.

 

In the Chrontel CH7301C datasheet, Table 2 has a minor error.  The column labeled "XCLK Frequency" is the pixel rate, not the XCLK frequency.

 

See the CH7301C datasheet, sections 3.2 and 3.3, and Figure 4.

 

Is there someone close by who can help you read and understand the CH7301C datasheet?

 

-- Bob Elkind

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Adventurer
Adventurer
6,276 Views
Registered: ‎10-26-2010

hi eteam00

 

ok you are right in this point 

if i adjust xclk to work at 2x so the pixel rate should be 50 ro 25 Mhz at resolution 640x480

 

please clear this point 

regards 

 

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Instructor
Instructor
6,272 Views
Registered: ‎07-21-2009

please clear this point

 

Did you ask a question?  If so, what is the question?

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Adventurer
Adventurer
6,270 Views
Registered: ‎10-26-2010

dear eteam00

 

my question is 

"the clock inputs can be 1X or 2X times the pixel rate." so in case 640x480 resolution  the fpga should give clock with 25MHz to drive DVI controller.

but if DVI is configured at 2x so in this case the fpga should give clock with 50MHz or not?

 

- when i send data D[11:0] to DVI controller through FPGA . it should be pixel clock is central aligned  with data or not ?

 

 

Regards 

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Instructor
Instructor
6,268 Views
Registered: ‎07-21-2009

"the clock inputs can be 1X or 2X times the pixel rate." so in case 640x480 resolution  the fpga should give clock with 25MHz to drive DVI controller.so in case 640x480 resolution  the fpga should give clock with 25MHz to drive DVI controller.

 

I do not understand this.  Is 25MHz the pixel clock or the 2x pixel clock?

 

but if DVI is configured at 2x so in this case the fpga should give clock with 50MHz or not?

 

1.  DVI is a video interface.  It uses a 1x pixel clock, always.  The Chrontel CH7301C is a device.  The CH7301C can be configured for either pixel rate clock or 2x pixel rate clock on XCLK input.  Which are you using for XCLK -- pixel rate clock or 2x pixel rate clock?  Do you know the answer to this question?

 

2.  If pixel rate is 25MHz and XCLK is 2x pixel rate, then XCLK should be 50MHz.

If pixel rate is 50MHz and XCLK is 1x pixel rate, then XCLK should be 50MHz.

 

Do you have someone close by who can help you read and understand the Chrontel CH7301C datasheet?

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Adventurer
Adventurer
6,264 Views
Registered: ‎10-26-2010

dear eteam00

 

thanks i understand what do you mean .

 

aslo i need for explain this point , please 

when i send data D[11:0] to DVI controller through FPGA . it should be pixel clock is central aligned  with data or not ?

 

 

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Instructor
Instructor
6,262 Views
Registered: ‎07-21-2009

when i send data D[11:0] to DVI controller through FPGA . it should be pixel clock is central aligned  with data or not ?

 

See Table 3 in the CH7301C datasheet, t1 and t2 timing requirements for setup and hold time with respect to XCLK (not necessarily the same as pixel clock).  If this is not possible, then the CH7301C has a facility for shifting (delaying)  the XCLK clock input using the IC register XCMD field.  See Table 9 in the datasheet.  Also see Table 17, tSTEP specification.

 

Do you have someone close by who can help you read and understand the CH7301C datasheet?

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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