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Visitor maxim_1235
Visitor
3,885 Views
Registered: ‎08-02-2016

vc707 aurora 64b66b example dont work

Hi. I'm trying to use vc707 board and aurora 64b66b ip-core example in Vivado 2016.1 and i have some troubles. At first stage I create new project for vc707 board and customize aurora core (Line Rate 3.125 Gbps, GT Refclk 125MHz, INIT clk 200 MHz, GT DRP clk 100 MHz, dataflow duplex, interface framing, flow control none, AXI4 lite and check vivado lab tools). In "gt selections" field i choose 1 lane and change X to 1 only for lowest list box for GTXQ0 (use GTXE2_CHANNEL_X1Y0). In "shared logic" field i choose include shared logic in example design. After that i click OK and generate. Then i do right-click on aurora_64b66b_0 core and choose "open ip example design" and click ok to overwrite the existing example design. In the newly-open vivado window i open aurora_64b66b_exdes.xdc file. then i change only LOC E19 for INIT_CLK_P and LOC E18 for INIT_CLK_N and add "set_property BITSTREAM.General.UnconstrainedPins {Allow} [current_design]" in the files end. For GTXQ0_P and GTXQ0_N use default AH8 and AH7 pins (125 MHz from ics844021l).

Then i generate bitstream without any errors or critical warnings. Then open hardware manager and auto-connect to target. After that i program device using bitstream and debug probes files. I see hw_ila_1 and hw_vios windows. It looks normal. But when i click "run trigger for this ila core" i have this error: "Unable to arm ILA 'hw_ila_1'. The core clock is slow or no core clock connected for this ila". I also test this aurora example on KC705 board and dont have this error. I attach xdc file that i use.

Can anybody help me understand and solve this problem?

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Visitor rbss
Visitor
3,855 Views
Registered: ‎01-17-2017

Re: vc707 aurora 64b66b example dont work

I don't know that board, but when I used the VC709 I had configured my reference clock wrong so it didn't start. After I sent the right values over I2C and routed its input to the right port it worked great.

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Explorer
Explorer
3,837 Views
Registered: ‎10-14-2015

Re: vc707 aurora 64b66b example dont work

Hi @maxim_1235,

 

Can you try reducing the Cable Frequency before programming the device in VC707

Also refer https://www.xilinx.com/support/answers/52939.html

 

Thanks,

Sarada

 

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Visitor maxim_1235
Visitor
3,727 Views
Registered: ‎08-02-2016

Re: vc707 aurora 64b66b example dont work

Thanks for your help. i tried reducing the Cable Frequency but it didn't solve my problem. i found that my aurora64b66b example project on vc707 doesn't have clk_in_i clock for MMCME2_ADV module. this clock goes from ip-core module aurora_64b66b_0 (tx_out_clk clock). when i use xilinx example aurora64b66b project on kc705 i see this cklock and project works normal.

Why do I havn't this clock on vc707? What wrong?

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