02-07-2018 03:31 AM
hi community, what is the required voltage for the Zedboad (7-series), i mean the whole chip? or the minimum required voltage for advanced FPGA?
thank you for replying as soon as possible
02-07-2018 03:43 AM - edited 02-07-2018 03:46 AM
@zozo-Please clearly specify which voltage that you are referring?
If you are asking about PL IO banks VCCO then it depends upon IO standards you defined for that bank. The default IO standard is LVCMOS 3.3V. So the default VCCO is 3.3V.
02-07-2018 03:50 AM
hi @umamahe, thanks for replying, i mean for example in vivado when i designed my architecture so is needing a voltage to work on or we can say to be powerd. i'm talking about all the chip ( all the IPs the maximum voltage that need to work)
03-01-2018 02:21 AM
Modern FPGAs need several different power supplies. On the Zedboard, you have:
1.0V - VCCINT (PL fabric), VCCPINT (PS), VCCBRAM (BRAM)
1.5V - VCC_DDR (RAM interface)
1.8V - VCCAUX (configuration interface), VCCPAUX (PS configuration interface), VCCPO_MIO1 (PS I/O)
3.3V - VCCPO_MIO0 (PS I/O), VCCO_13 (PL I/O), VCCO_33 (PL I/O), VCCO_0 (configuration interface I/O)
VADJ - VCCO_34 (PL I/O), VCCO_35 (PL I/O)
VADJ can be set to 1.8V, 2.5V, or 3.3V using a jumper.
The Zedboard itself just accepts 12V, which then powers everything else.
03-05-2018 01:26 AM
You can consider using the XPE.
You can use the values found from VIVADO after design implementation and put them under the sections given in the excel sheet
to get the power consumption by chip.
Hope this helps.