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Observer
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Registered: ‎09-06-2009

zc702_Schematic Migration error!

 PADS9.2  open the project file CURRENT.proj, reports migration error! the log file shows as follow:

Migration log file

00:00:00 Starting Migration
00:00:00 old file backup
00:00:00 Project configuration files are being read...
00:00:00 Parse .dproj file
00:00:00 Parse .dproj file: done
00:00:00 CDB flow is not used. Migrate as NETLIST flow...
00:00:00 The following schematics found in E:\work\zynq\zc702_Schematic_Source_rdf0174_rev1_0\:
00:00:00 'zc702.1' 'zc702.10' 'zc702.11' 'zc702.12' 'zc702.13' 'zc702.14' 'zc702.15' 'zc702.16' 'zc702.17' 'zc702.18' 'zc702.19' 'zc702.2' 'zc702.20' 'zc702.21' 'zc702.22' 'zc702.23' 'zc702.24' 'zc702.25' 'zc702.26' 'zc702.27' 'zc702.28' 'zc702.29' 'zc702.3' 'zc702.30' 'zc702.31' 'zc702.32' 'zc702.33' 'zc702.34' 'zc702.35' 'zc702.36' 'zc702.37' 'zc702.38' 'zc702.39' 'zc702.4' 'zc702.40' 'zc702.41' 'zc702.42' 'zc702.43' 'zc702.44' 'zc702.45' 'zc702.46' 'zc702.47' 'zc702.48' 'zc702.5' 'zc702.6' 'zc702.7' 'zc702.8' 'zc702.9'
Reading navigator.ini for getting root block name
navigator.ini cannot be opened
The following schematics found in E:\work\zynq\zc702_Schematic_Source_rdf0174_rev1_0\:
'88E1116R_A.1' '88E1116R_B.1' 'ASP_134603_01_C.1' 'ASP_134603_01_D.1' 'ASP_134603_01_G.1' 'ASP_134603_01_GND.1' 'ASP_134603_01_H.1' 'CD74HC4051PWT.1' 'CONN_USB_MINI_B_TH.1' 'CONN_USB_MINI_B_TH_1.1' 'HDR_1X3.1' 'HDR_1X3A_NS.1' 'SI570.1' 'SI570A.1' 'SN74AVC2T245.1' 'SN74AVC2T245_1.1' 'XC7Z020CLG484_0.1' 'XC7Z020CLG484_13.1' 'XC7Z020CLG484_33.1' 'XC7Z020CLG484_34.1' 'XC7Z020CLG484_35.1' 'XC7Z020CLG484_500.1' 'XC7Z020CLG484_501.1' 'XC7Z020CLG484_502.1' 'XC7Z020CLG484_GND.1' 'XC7Z020CLG484_VCCAUX.1' 'XC7Z020CLG484_VCCBRAM.1' 'XC7Z020CLG484_VCCINT.1' 'XC7Z020CLG484_VCCPAUX.1' 'XC7Z020CLG484_VCCPINT.1' 'XC7Z020CLG484_VCCPLL.1'
Checking wir files...
00:00:00 The following schematics found in E:\work\zynq\zc702_Schematic_Source_rdf0174_rev1_0\:
00:00:00 'zc702.1' 'zc702.10' 'zc702.11' 'zc702.12' 'zc702.13' 'zc702.14' 'zc702.15' 'zc702.16' 'zc702.17' 'zc702.18' 'zc702.19' 'zc702.2' 'zc702.20' 'zc702.21' 'zc702.22' 'zc702.23' 'zc702.24' 'zc702.25' 'zc702.26' 'zc702.27' 'zc702.28' 'zc702.29' 'zc702.3' 'zc702.30' 'zc702.31' 'zc702.32' 'zc702.33' 'zc702.34' 'zc702.35' 'zc702.36' 'zc702.37' 'zc702.38' 'zc702.39' 'zc702.4' 'zc702.40' 'zc702.41' 'zc702.42' 'zc702.43' 'zc702.44' 'zc702.45' 'zc702.46' 'zc702.47' 'zc702.48' 'zc702.5' 'zc702.6' 'zc702.7' 'zc702.8' 'zc702.9'
zc702.1
zc702.10
zc702.11
zc702.12
zc702.13
zc702.14
zc702.15
zc702.16
zc702.17
zc702.18
zc702.19
zc702.2
zc702.20
zc702.21
zc702.22
zc702.23
zc702.24
zc702.25
zc702.26
zc702.27
zc702.28
zc702.29
zc702.3
zc702.30
zc702.31
zc702.32
zc702.33
zc702.34
zc702.35
zc702.36
zc702.37
zc702.38
zc702.39
zc702.4
zc702.40
zc702.41
zc702.42
zc702.43
zc702.44
zc702.45
zc702.46
zc702.47
zc702.48
zc702.5
zc702.6
zc702.7
zc702.8
zc702.9
00:00:00 Parse Viewdraw.ini file
The following user-specific settings are defined in the project:
GRID: 5
SDISTANCE: 5
DEFSHEET: 1
DEF_USESHEET1: 0
DEFMETHOD: 0
DOTSIZE: 3
BOXSIZE: 3
BUSWIDTH: 2
BUS_DOTSIZE: 5
ADISTANCE: 10
The settings above have not been maintained during migration and it should be reset once the project has been opened. Note changing these settings will affect all projects that you open but do not affect the data in the project.
00:00:00 Generating WIR files...
00:00:00 The following schematics found in E:\work\zynq\zc702_Schematic_Source_rdf0174_rev1_0\:
00:00:00 'zc702.1' 'zc702.10' 'zc702.11' 'zc702.12' 'zc702.13' 'zc702.14' 'zc702.15' 'zc702.16' 'zc702.17' 'zc702.18' 'zc702.19' 'zc702.2' 'zc702.20' 'zc702.21' 'zc702.22' 'zc702.23' 'zc702.24' 'zc702.25' 'zc702.26' 'zc702.27' 'zc702.28' 'zc702.29' 'zc702.3' 'zc702.30' 'zc702.31' 'zc702.32' 'zc702.33' 'zc702.34' 'zc702.35' 'zc702.36' 'zc702.37' 'zc702.38' 'zc702.39' 'zc702.4' 'zc702.40' 'zc702.41' 'zc702.42' 'zc702.43' 'zc702.44' 'zc702.45' 'zc702.46' 'zc702.47' 'zc702.48' 'zc702.5' 'zc702.6' 'zc702.7' 'zc702.8' 'zc702.9'
00:00:08 Generating WIR files: done
00:00:08 CProjectMigration::OpenICDB()
00:00:08 iCDB opened successfully
00:00:08 AddSnapshot successful
00:00:08 Design blocks conversion
00:00:08 The following schematics found in E:\work\zynq\zc702_Schematic_Source_rdf0174_rev1_0\:
00:00:08 'zc702.1' 'zc702.10' 'zc702.11' 'zc702.12' 'zc702.13' 'zc702.14' 'zc702.15' 'zc702.16' 'zc702.17' 'zc702.18' 'zc702.19' 'zc702.2' 'zc702.20' 'zc702.21' 'zc702.22' 'zc702.23' 'zc702.24' 'zc702.25' 'zc702.26' 'zc702.27' 'zc702.28' 'zc702.29' 'zc702.3' 'zc702.30' 'zc702.31' 'zc702.32' 'zc702.33' 'zc702.34' 'zc702.35' 'zc702.36' 'zc702.37' 'zc702.38' 'zc702.39' 'zc702.4' 'zc702.40' 'zc702.41' 'zc702.42' 'zc702.43' 'zc702.44' 'zc702.45' 'zc702.46' 'zc702.47' 'zc702.48' 'zc702.5' 'zc702.6' 'zc702.7' 'zc702.8' 'zc702.9'
00:00:08 Adding block zc702.1
00:00:08 Adding block zc702.2
00:00:08 Adding block zc702.3
00:00:08 Adding block zc702.4
00:00:08 Adding block zc702.5
00:00:08 Adding block zc702.6
00:00:08 Adding block zc702.7
00:00:08 Adding block zc702.8
00:00:08 Adding block zc702.9
00:00:08 Adding block zc702.10
00:00:08 Adding block zc702.11
00:00:08 Adding block zc702.12
00:00:08 Adding block zc702.13
00:00:08 Adding block zc702.14
00:00:08 Adding block zc702.15
00:00:08 Adding block zc702.16
00:00:08 Adding block zc702.17
00:00:08 Adding block zc702.18
00:00:08 Adding block zc702.19
00:00:08 Adding block zc702.20
00:00:08 Adding block zc702.21
00:00:08 Adding block zc702.22
00:00:08 Adding block zc702.23
00:00:08 Adding block zc702.24
00:00:08 Adding block zc702.25
00:00:08 Adding block zc702.26
00:00:08 Adding block zc702.27
00:00:08 Adding block zc702.28
00:00:08 Adding block zc702.29
00:00:08 Adding block zc702.30
00:00:08 Adding block zc702.31
00:00:08 Adding block zc702.32
00:00:08 Adding block zc702.33
00:00:08 Adding block zc702.34
00:00:08 Adding block zc702.35
00:00:08 Adding block zc702.36
00:00:08 Adding block zc702.37
00:00:08 Adding block zc702.38
00:00:08 Adding block zc702.39
00:00:08 Adding block zc702.40
00:00:08 Adding block zc702.41
00:00:08 Adding block zc702.42
00:00:08 Adding block zc702.43
00:00:08 Adding block zc702.44
00:00:08 Adding block zc702.45
00:00:08 Adding block zc702.46
00:00:08 Adding block zc702.47
00:00:08 Adding block zc702.48
00:00:13 Error: Default configuration for zc702.1 cannot be created:
viewbase: Error 222: Error - Could not find WIR file HDR_2X5_ALT.1.
00:00:13 Migration stopped because schematics cannot be migrated to iCDB

 

what's wrong with it? how to resolve this problem? thanks very much!

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