cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Adventurer
Adventurer
4,478 Views
Registered: ‎12-15-2016

zcu102 Rev D1 (ES1) hangs when booting Linux with default configs of SDK 2017.2

Jump to solution

Trying to quickly get a zynqmp - SCU102 RevD1 (ES1) board up and running using 2017.2 components.

Though the Linux kernel is hanging trying to load.

 

The boot bin setup is as follows.

 

A very simple boot.bin consisting of ATF, PMU firmware, FSBL and u-boot.

 

ATF is the 2017.2 version from https://github.com/Xilinx/arm-trusted-firmware and build using

 

make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1

The FSBL and PMU firmware is build using xsct and the attached build tcl scripts.

 

Notice the use of hw template ZCU102-ES1_hw_platform from the SDK.

 

u-boot is the 2017.2 version from https://github.com/Xilinx/u-boot-xlnx and is build using

 

CROSS_COMPILE=aarch64-linux-gnu-
make CROSS_COMPILE=$CROSS_COMPILE xilinx_zynqmp_zcu102_rev1.0_defconfig
make CROSS_COMPILE=$CROSS_COMPILE 

 

 

Package the boot.bin like this

 

 

the_ROM_image:
{
    [destination_cpu=a53-0,bootloader]      ./out/fsbl.elf
    [pmufw_image]                           ./out/pmufw.elf
    
    // The bl31/atf must be before the u-boot image:
    [destination_cpu=a53-0,exception_level=el-3,trustzone] ./out/bl31.elf
    [destination_cpu=a53-0,exception_level=el-2] ./out/u-boot.elf
}

 

 

This boots perfectly to u-boot.

 

 

Xilinx Zynq MP First Stage Boot Loader
Release 2017.2   Sep  7 2017  -  09:59:01
Reset Mode      :       System Reset
Platform: Silicon (1.0), Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
SD1 Boot Mode
  ATF running on XCZU9EG/silicon v1/RTL5.1 at 0xfffea000, with PMU firmware
NOTICE:  BL31: Secure code at 0x0
NOTICE:  BL31: Non secure code at 0x8000000
NOTICE:  BL31: v1.3(release):0d9d51a
NOTICE:  BL31: Built : 08:17:57, Sep  1 2017
PMUFW:  v0.3


U-Boot 2017.01-01686-gfbfc72a (Sep 07 2017 - 09:59:33 +0200) Xilinx ZynqMP ZCU102 rev1.0

I2C:   ready
DRAM:  4 GiB
EL Level:       EL2
Chip ID:        xczu9eg
MMC:   sdhci@ff170000: 0 (SD)
reading uboot.env
In:    serial@ff000000
Out:   serial@ff000000
Err:   serial@ff000000
Net:   ZYNQ GEM: ff0e0000, phyaddr c, interface rgmii-id
eth0: ethernet@ff0e0000
Hit any key to stop autoboot:  0
ZynqMP>

 

Next I TFTP the device tree and kernel and boot. The kernel hangs after

 

[    2.974448] sdhci: Copyright(c) Pierre Ossman
[    2.978785] sdhci-pltfm: SDHCI platform and OF driver helper
[    2.989110] ledtrig-cpu: registered to indicate activity on CPUs
[    2.995176] usbcore: registered new interface driver usbhid
[    3.000672] usbhid: USB HID core driver

 

The kernel and device tree is the latest (SHA 1 9f16845d5da076e11c8b94a0ca8cf944a62a24fb)  from https://github.com/Xilinx/linux-xlnx build using

 

make ARCH=arm64 xilinx_zynqmp_defconfig
make ARCH=arm64 -j8

The DTB is arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb

 

Attaching the debugger reveals that I can't read the registers on the APU cluster.

So need to figure out where the issue is.

 

Will create another post regarding configuration of ETM in the APU, as if I got tracing I would know exactly where in the code the issue is created.

 

Please advise

0 Kudos
Reply
1 Solution

Accepted Solutions
Adventurer
Adventurer
6,848 Views
Registered: ‎12-15-2016

Have created a workaround.

 

The problem seems to be the missing loading of a bit file. Grepping the bit file from the latest BSP (2017.1) and included this in the bit file removes this problem.

It seems the axi bus locks up, and also prevent any access to the registers in the APU part.

 

As device tree I ended up just using the one from the latest bsp (2017.1)

 

 

View solution in original post

0 Kudos
Reply
10 Replies
Moderator
Moderator
4,469 Views
Registered: ‎11-09-2015

Hi @frosteyes,

 

To be honest, if you still have an ES1 devices you might want to stick with vivado 2016.4.

 

I also had issue with ES1 when using 2017.1 or 2017.2. It could come from the PMU FW.

 

Also your DTB is for rev1.0 which has a production silicon. Not sure if that can work.

 

You might want to contact you FAE to see if you can have the silicon replaced with a production silicon.

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos
Reply
Adventurer
Adventurer
4,467 Views
Registered: ‎12-15-2016

For the adminstrators.

I placed the post under Xilinx boards and kits as it concern the ZCU102 kit, but on reflection on the contents (only embedded system relevant), the post might be better placed in the embedded system section. So please move the post if you think this is more appropriate.

0 Kudos
Reply
Adventurer
Adventurer
4,445 Views
Registered: ‎12-15-2016

Hi @florentw

 

Thanks for your reply.

 

Regarding sticking with 2016.4. This is not an option for me, as I need the newest fixes in the Linux driver. (The new version of the kernel than need the new PMU firmware etc).

Can you disclose the newest official statement regarding when support of zynqmp ES 1 and ES 2 devices are discontinued? I would expect 2017.4 to be the last version with ES support.

 

Regarding PMU fw issue. Come across https://www.xilinx.com/support/answers/66436.html and will verify if this is the problem.

 

Tested with an older 2016.4 dtb and it boots. Do you know where I can get the dts/dtb for the zcu 102 es 1, for 2017.2 version? Should I try to generate one from the ES 1 template hdf file?

 

Have contacted our FAE and asked for when a production ZCU102 would be available. However, the time is an issue, and the no matter we would still need to be running on ES on custom boards.

 

Regards

Claus

0 Kudos
Reply
Moderator
Moderator
4,441 Views
Registered: ‎11-09-2015

Hi @frosteyes,

 

Can you disclose the newest official statement regarding when support of zynqmp ES 1 and ES 2 devices are discontinued? I would expect 2017.4 to be the last version with ES support.

Check the ZCU102 Limitations & Acceptance Letter from the lounge. The latest supported version for ES1 is 2017.1

 

Tested with an older 2016.4 dtb and it boots. Do you know where I can get the dts/dtb for the zcu 102 es 1, for 2017.2 version? Should I try to generate one from the ES 1 template hdf file?

I am not sure you can get them after 2016.4. So yes you might want to generate them by yourself

 

Have contacted our FAE and asked for when a production ZCU102 would be available. However, the time is an issue, and the no matter we would still need to be running on ES on custom boards.

Discuss this with you FAE. Not sure if you will have full support

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos
Reply
Adventurer
Adventurer
6,849 Views
Registered: ‎12-15-2016

Have created a workaround.

 

The problem seems to be the missing loading of a bit file. Grepping the bit file from the latest BSP (2017.1) and included this in the bit file removes this problem.

It seems the axi bus locks up, and also prevent any access to the registers in the APU part.

 

As device tree I ended up just using the one from the latest bsp (2017.1)

 

 

View solution in original post

0 Kudos
Reply
Explorer
Explorer
4,137 Views
Registered: ‎11-24-2013

Hi @frosteyes,

 

I'm having exactly the same problem as you with a Zynq Ultrascale+ ES1. In my case, I'm creating FSBL, bl31.elf, u-boot and device tree with Petalinux 2017.1, and I'm compiling the Xilinx Linux Kernel myself. U-Boot loads perfectly. But when booting the kernel, it hangs if there's no bit file.

 

If I boot without .bit file, the booting process hangs at:

[    3.167264] usbhid: USB HID core driver

And if I add a .bit, it works and the following message is:

[    3.167264] usbhid: USB HID core driver
[    3.173070] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered

 

Did you find a soultion for your case or do you still have to add a .bit file?

 

For me, adding a .bit file is a problem, since it takes up to 50 sec (!!) for the FPGA to get programmed, which I cannot understand...

 

Thanks and Regards,

Ignacio

0 Kudos
Reply
Adventurer
Adventurer
4,130 Views
Registered: ‎12-15-2016

Hi @imgignacio

 

Sorry, not yet.

 

As I currently working on the general system and the boot time is not a problem yet, I have postponed to solve it, in the hope that Xilinx or others find a solution.

If this is not the case I will to fix it myself.

Please let me know if you find a solution, and I will try to update this topic if I get to work with it.

Notice you can find me on irc - the ##zynq channel on freenode.

 

0 Kudos
Reply
Explorer
Explorer
4,121 Views
Registered: ‎11-24-2013

Hi @frosteyes,

 

thanks for the quick answer! I will also keep you updated if I find a solution.

 

Just a small question: in your case, does it boot normally if you use the device tree of 2016.4?

 

Since this problem is clearly related to the FPGA part, I thought it could have 2 sources:

  • The initialization of the chip (FSBL or PMUfw).
  • The device tree, since the kernel tries to access the FPGA.

There is also something that confuses me: if I boot from JTAG with the same components (and same device tree), everything works fine. I do this with the tool xsct and before loading the things I execute "psu_config".

 

Regards,

Ignacio

0 Kudos
Reply
Adventurer
Adventurer
4,116 Views
Registered: ‎12-15-2016

@imgignacio if I remember correctly it was booting with device tree from 2016.4, though with much not working.

 

Have not booted from JTAG, so can't comment on this.

 

I was also looking if I could disable the FPGA part in the device tree, though I also looked for disabling fpga manager in the kernel.

 

Did not work, but I was not looking very much into it.

0 Kudos
Reply
Explorer
Explorer
1,860 Views
Registered: ‎01-24-2018

Trouble shooting the problem with your board caused me to try without FPGA firmware in the BOOT.BIN file and I ran into this again.

 

https://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/zcu102-Rev-D1-ES1-hangs-when-booting-Linux-with-default-configs/td-p/792101

 

It hangs when booting Linux at...

usbhid: USB HID core driver

 

If I do include FPGA firmware, then the remoteproc module indicates it failed to load firmware for the R5.

 

Starting udev

...

...

[5.489860] remoteproc remoteproc0: Direct firmware load for rproc-ffa0100.zynqmp_r5_rproc-fw failed with errno -2

 

 

This seems to be just broken code.

Why is the drivers/base/firmware_class.c code trying to load FPGA firmware into the R5???

 

0 Kudos
Reply