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douglas.yamamoto
Contributor
Contributor
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Registered: ‎08-17-2018

AXI BRAM Controller to RTL Read

I currently have a custom RTL connected to an AXI BRAM Controller.  This AXI BRAM Controller is connected to a Block Memory Generator that also shares a connection to a Zynq Processing System, via an AXI Interconnect.  I can write values to the BRAM via the RTL, which are confirmed both by a testbench and reading through the PS.  However, if I have the PS write to the BRAM I can not read information via the RTL. 

 

The attached testbench shows the waveforms associated with the RTL-AXI BRAM Controller connections.  The values of "led_0" are a way of debugging the FSM's current state real time.  The waveform suggests that the FSM is working properly, the values of "rlast" and "rvalid" are driven low by the AXI BRAM Controller and causes the FSM to change it's "currentState" to 0x4.  Once this "currentState" value is changed to 0x4, the "led_0" value changes to 0xff.  Which the last 8 bits of information written to the BRAM, and is desired to display on the board for debugging/confirmation purposes. 

 

However, when the bitstream and PS is programmed onto the ZC702 demo board this behavior is not reflected.  Writing to the BRAM is functioning properly, from the RTL as well as the PS.  But the read from the BRAM, via the RTL, is not working.  Reading the BRAM using the PS is functioning, and confirmed through PuTTY.  Results of the RTL reading the BRAM are the "led_0" values shown on the board are either 0x00 or 0x74.  There is a value of 0x74 written somewhere in the BRAM, but it is not the value that should be written to the LED's.

 

Thank you for any help.

WaveformCapture.PNG
BDCapture.PNG
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3 Replies
pthakare
Moderator
Moderator
1,287 Views
Registered: ‎08-08-2017

Hi @douglas.yamamoto

 

As i can see , you have also filed the SR with the same issue. I will post the my answer here after resolution

 

 

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douglas.yamamoto
Contributor
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Registered: ‎08-17-2018

@pthakare

 

I have changed some structure to my state machine, but the timing and outputs remain the same.  But now I am not receiving data through my simulations at this point.

 

My RTL is now never receiving a "arready" signal from the AXI BRAM controller.  I used the same parameter values for "arlen", "arsize" and "arburst" as before.  Additionally, I have looked at the signals that the simulated PS is outputting to another AXI BRAM controller reading a single 32 bit frame of data from the same BRAM.  Using the same timing and parameter values, I do not get the same results.

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joe306
Scholar
Scholar
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Registered: ‎12-07-2018

Hello, were you able to get things working? If so, could you share your solution. I'm trying to do the same thing. Thank you

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