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Visitor kevin_rowley
Visitor
162 Views
Registered: ‎11-14-2019

AXI slave memory error injection

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Hello,

 

Can I configure the Xilinx AXI slave memory VIP to inject BRESP/RRESP errors ?

 

Thank you,

 

-k rowley

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Moderator
Moderator
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Registered: ‎11-09-2015

Re: AXI slave memory error injection

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HI @kevin_rowley 

I do not think this is possible in the AXI slave memory VIP. I believe you need to use an AXI slave VIP (without memory level) if you want to have the control on the signals:

 

VIP.JPG

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
112 Views
Registered: ‎11-09-2015

Re: AXI slave memory error injection

Jump to solution

HI @kevin_rowley 

I do not think this is possible in the AXI slave memory VIP. I believe you need to use an AXI slave VIP (without memory level) if you want to have the control on the signals:

 

VIP.JPG

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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