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joe306
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Registered: ‎12-07-2018

Aurora 64B/66B Advanced Setttings

Hello, I'm using the Zynq Ultrascale+ MPSOC on a custom board. I am using the Aurora 64B/66B IP and I need some guidance on how to configure the Advanced settings:

Aurora_Advanced.jpg

How do I determine the Insertion Loss setting?

I'm interfacing the Aurora IP with a Fast Fiber Transceiver.

I used the ZCU 106 board to test out the Aurora IP with it SFP connectors, but I used a different fiber transceiver and left these settings alone. So, I'm not sure if I should leave these at their default settings.

Can anyone give me some help please.

 

Thank you,

Joe

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barriet
Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

It depends on your channel, e.g. PCB geometry, stack-up, board material, etc. For a 10Gbps link, what much loss is there at 5Ghz? Typically extracted based on PCB simulation.

Maybe someone else has a better estimate/rule of thumb, but there's some usage info here:

https://www.xilinx.com/support/answers/57743.html  (Xilinx HSSIO Solution Center - Design Assistant Debugging Equalization and Margin Problems)

That said, I think most people leave them at the default values unless you've got a "difficult" channel, e.g. 10G-KR backplane or running at very high rates and the backplane/board wasn't designed for it.

But I'll admit I'm not the high-speed signal integrity expert...

Cheers,

bt

joe306
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Registered: ‎12-07-2018

Thank you very much for responding to my post. I'm running the IP at 3.125 Gbps.

Joe
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barriet
Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

It really depends... I'd be surprised if most well designed boards with a short trace runs to a close fiber transceiver had much appreciable channel loss at 1.6GHz... If anything, you might have to decrease the insertion loss setting here.

But again - it depends on the channel (board, connectors, etc.) But I'd certainly be surprised initially if you had to increase the setting based on your description... And don't really have any other rules of thumbs - just a feeling based on some insertion loss plots I've seen here long ago.

 

Cheers,

bt

 

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joe306
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Registered: ‎12-07-2018

Hello, we are interfacing with a Endurance Fiber Transceiver and I'm able to measure it internal RX power (TX Bias) through an I2C interface. The TX Bias is measuring at 56mA and should be 7.5mA. Should I try decreasing the insertion loss? Should I try 5 or 10 or even 0?

Thank you
Joe
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barriet
Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

Good question, I'll admit I don't know.

My recommendation would be to use Vivado IBERT to find suitable settings (see ug908 & ug936) for your hardware setup to get an optimium eye/BER and then back those transceiver settings into your Aurora design.

Cheers,

bt

joe306
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Registered: ‎12-07-2018

Ignore this:

The TX Bias is measuring at 56mA and should be 7.5mA. Should I try decreasing the insertion loss? Should I try 5 or 10 or even 0?

 

My numbers are not correct. I believe my problem the fiber cable I'm using.

 

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joe306
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Registered: ‎12-07-2018

Hello, thank you for responding to my post and thank you for the information on the documentation for the IBERT.
Respectfully,
Joe
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