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vhdlveri123
Explorer
Explorer
324 Views
Registered: ‎04-21-2021

Aurora master and slave

Hi,

If i want to transfer data from one FPGA to another using Aurora IP, should i make one IP master in one FPGA and the other one slave in the other FPGA?

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kdeshwal
Xilinx Employee
Xilinx Employee
261 Views
Registered: ‎11-12-2019

Hi @vhdlveri123 ,

Not necessary but again depends on the targeted application.


Thanks,
Kuldeep

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vhdlveri123
Explorer
Explorer
183 Views
Registered: ‎04-21-2021

Hi,

So if i am using a second FPGA, i can use the reference clock from the first one to drive the GTH transceiver of the second FPGA right?

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rkhatri
Moderator
Moderator
134 Views
Registered: ‎01-10-2019

Hi @vhdlveri123,

Yes you can do clock sharing but please make sure reference clock is passing GT phase noise mask.

Thanks,
Rahul Khatri
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