10-23-2020 02:45 PM - edited 10-23-2020 06:11 PM
I am doing near-end loopback modes 1 or 2 on an ultrascale+ production part using 2019.2. It meets timing.
I send a single 256b word when aurora is ready, simultaneously updating the PRN that defines the contents of the word. I send N words.
I receive a single 256b word when aurora tells me there is valid data simultaneously updating a mirror PRN with the same seed. I receive N-x words.
The N-x received words received match those transmitted. This could only happen if aurora is not sending all words back that it accepted.
The X shortfall varies with how many I send (x/N=~1.6%). Furthermore in loopback mode 1 aurora sends me a sys_reset_out roughly every N words, but it does not in loopback mode 2.
I am not using native flow control because no one has answered the question of whether that is required. I am not setting RXOUTCLKSEL to anything because no one has advised yet on whether that is needed for this register to register transfer. Even if it was required, I have no way to set that control signal because I have not received an answer to where to find or get the gt_wizard for doing that.
So without further input from Xilinx, I have to conclude that near-end loopback does not work and Xilinx is maintaining complete silence. If it does work, show me the fault in this logic.
10-29-2020 08:17 AM
Have you tested this design in simulation? This would be the fastest way to find this problem.