The Block Memory Generator, FIFO Generator, Distributed Logic Generator, and ECC are mature IP that have been used in Xilinx FPGAs for generations and have reached a high level of quality. Users do occasionally encounter issues or questions regarding usage, so Xilinx has put together this collection of available documentation, including a recently created FAQ based on the top Technical Support and Forum questions. Please reference the links below for the User guides, Product Guides, Application notes (XAPPs), Known Issue and FAQs
User Guides :
UG573 : UltraScale Architecture Memory Resources
UG473 : 7 Series FPGAs Memory Resources
UG383 : Spartan-6 FPGA Block RAM Resource
UG363 : Virtex-6 FPGA Memory Resources
UG974 : UltraScale Architecture Libraries Guide
UG953 : Vivado Design Suite 7 Series FPGA and Zynq-7000 SoC Libraries Guide
IP Product guides :
PG058 : Block Memory Generator v8.4 LogiCORE IP Product Guide
PG057: FIFO Generator v13.2 LogiCORE IP Product Guide
PG063: Distributed Memory Generator v8.0 LogiCORE IP Product Guide
PG092 : ECC v2.0 LogiCORE IP Product Guide
Application Notes :
XAPP992 : FIFO Generator Migration Guide
XAPP917 : Block Memory Generator Migration Guide
Top Issues FAQ:
AR68033 – FIFO Generator and Block Memory Generator IP – Frequently Asked Questions
Known Issues Answer Records:
AR54663 – FIFO Generator – Release Notes and Known Issues
AR54662 – Block Memory Generator – Release Notes and Known Issues
AR54661 – Distributed Memory Generator – Release Notes and Known Issues
Performance and Resource Utilization Pages:
Block Memory Generator
Distributed Memory Generator
FIFO Generator
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Reply if you have any queries, give kudos and accept as solution
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