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2,831 Views
Registered: ‎11-07-2018

BRAM Optimization

Hello,

I am currently working on the Zynq7045 FPGA to build my project. I want to optimized my board and reduce the utilization. One particular project is using 57% BRAM. As I have a lot of other projects which need to be put onto the same board, I am looking to reduce my BRAM usage. 

Is there a way of reducing the BRAM in the project.

My FF usage is low (~8%).

Regards,

Vanshika

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Instructor
Instructor
2,827 Views
Registered: ‎10-23-2018

You can consider if some of your current BRAM could also be targeted at LUTRAM/ROM (distributed memory), if you have an imbalance of resources (e.g. more LUTs than RAM)

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Moderator
Moderator
2,795 Views
Registered: ‎08-08-2017

Hi @vanshika_chawla

Some of the BRAM utilization reduction methodologies

1. Use the DRAM based implementation as suggested by @xilinxacct  . Attribute to instruct the tool  (UG901) if you are inferring the memory

Capture.PNG

2. Select the Minimum area algorithm  :The memory is generated using the minimum number of block RAM primitives. Both data and parity bits are utilized.

Capture.PNG

 

3. Choose FIFO implementation in the design based not based on Block RAM

Capture.PNG

 

4. One more option is to use the URAM based implementation , but we dont have URAM resources in 7 series devices.

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Highlighted
2,754 Views
Registered: ‎11-07-2018

Hi @xilinxacct,

I am out of BRAM and LUT space. I need to look for other options

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Instructor
Instructor
2,747 Views
Registered: ‎10-23-2018

The utilization report will tell you how much over the capacity of your board is. That should help you pick more appropriate hardware. You probably want to give yourself a 20-30% buffer above what you need.

Hope that helps

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Instructor
Instructor
2,745 Views
Registered: ‎10-23-2018

One other outside chance, which probably won't get you enough resources, but depending on your program, the sizing of your RAM/ROM widths don't have to be standard 8,16,32. If your use case allows, you could shave some bits off to save some space.

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2,734 Views
Registered: ‎11-07-2018

Hi @xilinxacct
The target board cannot be changed for this project.
Looking at the utilization of the individual projects before integration, LUTS = 87% and BRAM = 130%.

Looking for more ideas here. :)
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Instructor
Instructor
2,730 Views
Registered: ‎10-23-2018

@vanshika_chawla

The 7045 has some DDR memory too, right? Maybe you can utilize that.

Since you do have some LUTs, the original idea of using LUT RAM/ROM might still be viable.

The 7045 has some hard processors, you might be able to migrate some logic into the CPUs and free up some more resources.

A general review to see what can get 'skinny'...

 

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Adventurer
Adventurer
2,378 Views
Registered: ‎10-04-2018

Sometimes you can change the RAM depth and its Resource usage remains the same.

So you can play little bit with RAM parameters and if possible increase the RAM depths, than combine several RAMs into one.

I mean just use 1 bigger RAM ( which up mentioned way) instead of 2 RAMs. 

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