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Observer
Observer
331 Views
Registered: ‎08-30-2019

BRAM size problem

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In the Address Editor, I can set the size of BRAM to 4KB/8KB/16KB/32KB/64KB/128KB/256KB/... with no problem.

However, I want the BRAM size to be something other than those preset values, e.g. 200KB.

Our design is depleting BRAM. Being able to tailor the size will be very useful.

 

I tried to toggle the Block Memory Generator  to "Stand Alone" mode, so that I can edit the depths.

Unfortunately, my app does not run on Microblaze on manually modified BRAM (I double checked the linker to fit in the smaller BRAM). Debugger prints a random stack.

 

 

Board: ZCU106, Vivado 2019.1

Thank you very much!

 

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Scholar
Scholar
309 Views
Registered: ‎05-21-2015

@zeph ,

I'd recommend getting a bigger FPGA instead.  Non-power of two block RAM sizes are known simulation vs synthesis mismatch issues across a host of EDA tools--not just Vivado.

Dan

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1 Reply
Scholar
Scholar
310 Views
Registered: ‎05-21-2015

@zeph ,

I'd recommend getting a bigger FPGA instead.  Non-power of two block RAM sizes are known simulation vs synthesis mismatch issues across a host of EDA tools--not just Vivado.

Dan

View solution in original post