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Visitor
Visitor
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Registered: ‎01-02-2020

Bringing up Aurora 64b66b IP with support logic in simulation

I'm using a Aurora64b66b IP in my design, and during my, when initializing the IP, I see no user_clk_out coming from the IP. lane_up and channel_up are also down.I am passing in init_clk and refclk1_in, reset_pb is being asserted for around 3.7us (similar to IP Example design). power_down s set to 0. pma_init mirrors reset_pb for 3.7us, which i see is a bit different (in duration) compared to example design. One difference, the IP is being simulated with the clock and other support logic in my simulation, which is a bit different from the example design (which has a wrapper module for these signals and then initializes the core without support logic). I'm trying to figure out why the core is not initializing? Am I perhaps missing any critical inputs?

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Moderator
Moderator
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Registered: ‎01-10-2019

Hi @spendyal ,

Issue was in configuration. 

Thanks,
Rahul Khatri
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Visitor
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Registered: ‎01-02-2020

Yes. That is correct. I was unable to figure out how to close this post.

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