How can I implement a cache memory for look-up purposes which works with my custom logic, not Microblaze or PPC or ARM?
I have implemented different cache architectures using VHDL or Verilog, but they cannot afford my performance requirements. On the other hand Microblaze has cache option. This means that there should be a way which implements an efficient cache memory. If there was an IP like SDRAM or DRAM, etc it would be nice; nonetheless it seems there is no such option.
How could I instance a cache memory using Xilinx/FPGA features which communicates with my custom logic?
Please keep in mind that there is no Microblaze or PPC or ARM processor.
Thanks
