09-24-2020 10:24 PM
How to add IP in Xilinx EDK ?
How to create Custom IP in Xilinx EDK?
If I create a custom IP using Vivado, will it suitable for Xilinx EDK ?
09-28-2020 02:46 AM - edited 09-28-2020 02:47 AM
Please answer this
How to Create custom IP in Xilinx ISE? I have HDL file, I need to convert into IP.
otherwise, Is custom IP created by Vivado and will it support to Xilinx ISE?
Please answer!!!!
09-28-2020 03:03 AM - edited 09-28-2020 03:27 AM
For Vivado - https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1118-vivado-creating-packaging-custom-ip.pdf
For ISE - https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/cgn_p_create_custom_core.htm
More help - https://forums.xilinx.com/t5/Synthesis/Making-and-using-own-IP-on-ISE/td-p/731456
I simply found this by searching using this phrase - Xilinx ISE custom IP create
You can also do something alike!
------------FPGA enthusiast------------
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09-28-2020 03:26 AM - edited 09-28-2020 03:32 AM
Yes, in vivado able to create custom IP.
My doubt, will it support to Xilinx ISE, EDK?
09-28-2020 03:28 AM
Yes. Have just updated my answer.
------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem
09-28-2020 03:33 AM
How to add IP in Xilinx ISE, EDK?