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mgh
Visitor
Visitor
445 Views
Registered: ‎10-24-2020

Deep FIFO

hello,

i would like to create a Deep fifo more than 256Mb on DDR4 but there is some limitation on VFIFO IP core.

is there any way to increase the memory page more than 8192*4K ?

thanks.

 

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joancab
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Advisor
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Registered: ‎05-11-2015

Couldn't you just chain as many as needed? With a generate command you basically write it once.

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mgh
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Visitor
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Registered: ‎10-24-2020

no I couldn't. I need more than 512Mb FIFO, is there any way to regenerate IP core or change it?

in fact I was wondering why we  have limitation on this IP core?

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joancab
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Advisor
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Registered: ‎05-11-2015

Everything is limited. Well, not everything. Human stupidity, for example.

In this case, the FIFO core needs to keep data addresses, there is a fixed number of bits for that that allows a maximum depth.

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joancab
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Advisor
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Registered: ‎05-11-2015

I haven't used that VFIFO (by the way, interesting for my current work) but I think with a scheme as below you can chain them.

joancab_0-1612171731148.png

 

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mgh
Visitor
Visitor
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Registered: ‎10-24-2020

thank you for your scheme, but there is another issue in your scheme

each VFIFO just working for 256Mb in fact, if our delay will be more than this amount some problem happen,

another things is the frequency, for having the chain we should decrease the frequency that we push data to the VFIFO(less than VFIFO working CLK )   

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