02-01-2021 12:47 AM
i would like to create a Deep fifo more than 256Mb on DDR4 but there is some limitation on VFIFO IP core.
is there any way to increase the memory page more than 8192*4K ?
02-01-2021 01:02 AM
no I couldn't. I need more than 512Mb FIFO, is there any way to regenerate IP core or change it?
in fact I was wondering why we have limitation on this IP core?
02-01-2021 01:23 AM
Everything is limited. Well, not everything. Human stupidity, for example.
In this case, the FIFO core needs to keep data addresses, there is a fixed number of bits for that that allows a maximum depth.
02-01-2021 01:29 AM - edited 02-01-2021 02:05 AM
I haven't used that VFIFO (by the way, interesting for my current work) but I think with a scheme as below you can chain them.
02-05-2021 12:40 AM
thank you for your scheme, but there is another issue in your scheme
each VFIFO just working for 256Mb in fact, if our delay will be more than this amount some problem happen,
another things is the frequency, for having the chain we should decrease the frequency that we push data to the VFIFO(less than VFIFO working CLK )